Abstract: A switch circuit (10) includes: a transistor (T1) switching the conductivity state between a drain terminal (D1) and a source terminal (S1) between being conductive and non-conductive; a transistor (T2) switching the conductivity state between a drain terminal (D2) and a source terminal (S2) between being conductive and non-conductive, the source terminals (S1) and (S2) being connected to a node (N1) and an input/output terminal (120), respectively, and the drain terminals (D1) and (D2) being connected to an input/output terminal (110) and the node (N1) respectively; a transistor (T3) switching the conductivity state between a drain terminal (D3) and a source terminal (S3) between being conductive and non-conductive, the drain terminal (D3) and the source terminal (S3) being arranged along a second path connecting the node (N1) and ground; and a capacitor (C1) placed in the second path and connected in series to the transistor (T3).

Abstract: An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).

Abstract: An amplifier includes at least one amplification circuit through one of which a bias current flows, a first memory that stores control information to specify the bias current to be fed through the one of the at least one amplification circuit, a digital control circuit that generates a bias current setting to set the bias current in accordance with the control information, a second memory that stores correction information to correct the bias current setting, a correction circuit that corrects the bias current setting in accordance with the correction information, and a bias circuit that determines the bias current in the one of the at least one amplification circuit in accordance with the bias current setting, which has been corrected.

Abstract: An amplifier circuit includes a first terminal and a second terminal, an amplifier disposed in a first path connecting the first terminal and the second terminal, a first switch circuit disposed in the first path between the amplifier and the second terminal, an attenuator disposed in the first path between the amplifier and the first switch circuit, and a second switch circuit disposed in a second path that is connected to the first terminal and the second terminal while bypassing the amplifier, the attenuator, and the first switch circuit.

Abstract: An amplifier circuit is a cascade amplifier circuit that includes a first transistor circuit including a signal input portion to which a signal is input from outside; a load circuit connected between the first transistor circuit and a power-supply line; and a second transistor cascode-connected between the load circuit and the first transistor circuit. The first transistor circuit is constituted by a plurality of transistors connected in parallel, and a bias circuit is provided that selectively supplies a bias voltage to the plurality of transistors.

Abstract: An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).

Abstract: A switch circuit (10) includes: a transistor (T1) switching the conductivity state between a drain terminal (D1) and a source terminal (S1) between being conductive and non-conductive; a transistor (T2) switching the conductivity state between a drain terminal (D2) and a source terminal (S2) between being conductive and non-conductive, the source terminals (S1) and (S2) being connected to a node (N1) and an input/output terminal (120), respectively, and the drain terminals (D1) and (D2) being connected to an input/output terminal (110) and the node (N1) respectively; a transistor (T3) switching the conductivity state between a drain terminal (D3) and a source terminal (S3) between being conductive and non-conductive, the drain terminal (D3) and the source terminal (S3) being arranged along a second path connecting the node (N1) and ground; and a capacitor (C1) placed in the second path and connected in series to the transistor (T3).

Abstract: An amplifier includes at least one amplification circuit through one of which a bias current flows, a first memory that stores control information to specify the bias current to be fed through the one of the at least one amplification circuit, a digital control circuit that generates a bias current setting to set the bias current in accordance with the control information, a second memory that stores correction information to correct the bias current setting, a correction circuit that corrects the bias current setting in accordance with the correction information, and a bias circuit that determines the bias current in the one of the at least one amplification circuit in accordance with the bias current setting, which has been corrected.

Abstract: An amplifier circuit includes a first terminal and a second terminal, an amplifier disposed in a first path connecting the first terminal and the second terminal, a first switch circuit disposed in the first path between the amplifier and the second terminal, an attenuator disposed in the first path between the amplifier and the first switch circuit, and a second switch circuit disposed in a second path that is connected to the first terminal and the second terminal while bypassing the amplifier, the attenuator, and the first switch circuit.

Abstract: An amplifier circuit is a cascade amplifier circuit that includes a first transistor circuit including a signal input portion to which a signal is input from outside; a load circuit connected between the first transistor circuit and a power-supply line; and a second transistor cascode-connected between the load circuit and the first transistor circuit. The first transistor circuit is constituted by a plurality of transistors connected in parallel, and a bias circuit is provided that selectively supplies a bias voltage to the plurality of transistors.

Abstract: A current source circuit includes p-type transistors 21p and 22p, n-type transistors 11n and 12n, an output n-type transistor, and a resistance element connected in series between the n-type transistor 12n and a ground. A gate terminal G2 is connected to a gate terminal G1 and a drain terminal D2, a gate terminal G3 is connected to a gate terminal G4 and a drain terminal D3, and a gate terminal G4 is connected to a gate terminal G5. A current I1 flows in sequence of the power supply terminal, the p-type transistor 21p, the n-type transistor 11n, and the ground, and a current I2 flows in sequence of the power supply terminal, the p-type transistor 22p, the n-type transistor 12n, and the ground. The resistance element has a positive temperature coefficient causing a resistance value to increase with a temperature rise.