Abstract: A loss (generation of heat) is reduced in a capacitor precharge circuit, thereby reducing the size of the circuit. The capacitor precharge circuit according to the present invention divides a power supply voltage using a switched capacitor voltage divider circuit, thereby carrying out charging while suppressing a both-terminal voltage of the capacitor that is subject to the charging (refer to FIG. 1).

Abstract: A vehicle control system which can ensure high reliability, real-time processing, and expandability with a simplified ECU configuration and a low cost by backing up an error through coordination in the entire system without increasing a degree of redundancy of individual controllers beyond the least necessary level. The vehicle control system comprises a sensor controller for taking in sensor signals indicating a status variable of a vehicle and an operation amount applied from a driver, a command controller for generating a control target value based on the sensor signals taken in by the sensor controller, and an actuator controller for receiving the control target value from the command controller and operating an actuator to control the vehicle, those three controller being interconnected via a network.

Abstract: An electronic control apparatus includes a control unit 2; a plurality of power supply units 1-1, 1-2 for supplying the control unit 2 with power; and a power supply fault detector unit 3 for detecting a fault in the plurality of power supply units 1-1, 1-2. The control unit 2 operates in a normal mode on electric power supplied from the plurality of power supply units 1-1, 1-2, when none of the plurality of power supply units 1-1, 1-2 is faulty. If at least one of the plurality of power supply units 1-1, 1-2 is faulty, the control unit 2 operates in an energy saving mode in which less power is consumed on electric power supplied from the power supply unit that remains fully operational. Thereby an electronic control apparatus is obtained that enables continued operation during a faulty condition, while preventing circuit scale, dimensions, weight, and cost from increasing.

Abstract: There has been a problem that a bridge circuit using magneto-resistive elements or transducer elements could output a signal including an offset voltage, which could result in lower measurement accuracy. In order to solve such a problem, half-bridges each having magneto-resistive elements or transducer elements are excited with different excitation voltages so that the offset voltage is eliminated and the measurement accuracy is improved.

Abstract: To have a problem of occurrence of the same failure in failure detection of a microcontroller. A microcontroller has a CPU and a data access control circuit. The data access control circuit performs two types of accesses: an individual access in which a data access of the CPU is performed for each thread, and a shared access in which a data access of the CPU is performed by executing two threads. The data access control circuit detects a failure of the CPU by making a comparison between the command and the address, respectively, in the shared access generated by executing the two threads.

Abstract: This invention provides a current control semiconductor element in which dependence of a sense ratio on a temperature distribution is eliminated and the accuracy of current detection using a sense MOSFET can be improved, and to provide a control device using the current control semiconductor element. The current control semiconductor element 1 includes a main MOSFET 7 that drives a current and a sense MOSFET 8 that is connected to the main MOSFET in parallel and detects a current shunted from a current of the main MOSFET. The main MOSFET is formed using a multi-finger MOSFET that has a plurality of channels and is arranged in a row. When a distance between the center of the multi-finger MOSFET 7 and a channel located farthest from the center of the multi-finger MOSFET 7 is indicated by L, a channel that is located closest to a position distant by a distance of (L/(?3)) from the center of the multi-finger MOSFET is used as a channel for the sense MOSFET 8.

Abstract: A vehicle control system which can ensure high reliability, real-time processing, and expandability with a simplified ECU configuration and a low cost by backing up an error through coordination in the entire system without increasing a degree of redundancy of individual controllers beyond the least necessary level. The vehicle control system comprises a sensor controller for taking in sensor signals indicating a status variable of a vehicle and an operation amount applied from a driver, a command controller for generating a control target value based on the sensor signals taken in by the sensor controller, and an actuator controller for receiving the control target value from the command controller and operating an actuator to control the vehicle, those three controller being interconnected via a network.

Abstract: First data to be written which is output from a function module (2) is supplied to a built-in memory (3) and a first buffer memory (11), and second data to be written which is output from the function module (2) is supplied to the built-in memory (3) and a second buffer memory (12). The first and second FIFO memories (13, 14) select and store data items having a predetermined number of outputs from a plurality of first and second output data items which are sequentially output from the first and second buffer memories (11, 12), and do not select other data items. A comparator (15) compares the data items having the predetermined number of outputs which are selected and are output by the first and second FIFO memories (13, 14) with each other.

Abstract: A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The microcontroller has a plurality of processing systems made up of a first CPU, a second CPU, a first memory and a second memory, and for the instruction processing about specific processing set in advance, the write to peripheral modules which are not multiplexed is executed twice, and the write data of the first time and the second time are mutually collated.

Abstract: A current control device capable of performing widely applicable failure detection without a motor rotation speed sensor is provided. A current control semiconductor element includes, on a same semiconductor chip, a transistor that drives load, a current detection circuit that detects current of the load, a compensator that calculates an on-duty of the transistor from a current command value and a current value output from the current detection circuit, and a PWM timer that generates a pulse turning on the transistor on the basis of the on-duty. A microcontroller sends the current command value to the current control semiconductor element, receives the current value output from the current detection circuit and the on-duty output from the compensator from the current control semiconductor element, and detects failure of the current control semiconductor element on the basis of the received current value and on-duty.

Abstract: A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode (master/checker operation) is provided. In a computer system including: at least two CPUs; a programmable interrupt controller for interrupting the CPUs; and a comparator for mutually comparing outputs of the CPUs, switching between the performance mode of executing mutually different processes by the CPUs, respectively, to improve performance and the safety mode of executing mutually the same processes by the CPUs and collating results by the comparator to detect failure can be carried out; CPUs to be interrupted can be set for each interrupt factor; and whether the performance mode is to be executed or the safety mode is to be executed can be set for each interrupt factor.

Abstract: The present invention provides a semiconductor integrated circuit device realizing improved detection of a failure while suppressing deterioration in performance. In a semiconductor integrated circuit device executing a plurality of threads while switching them synchronously with clocks, registers used for executing the threads are provided for the respective threads. Programs independent of each other and the same program as the threads are executed while being switched. In the case of executing the same program by a plurality of threads, a comparison circuit for comparing results of execution using registers provided in correspondence with the threads is provided.

Abstract: This invention provides a current control semiconductor element that can detect a current with high accuracy in a single IC chip by dynamically correcting changes in a gain a and an offset b, and a control device that uses the current control semiconductor element. The current control semiconductor element has a transistor 4, a current-to-voltage conversion circuit 22 and an AD converter 23 on the same semiconductor chip. A reference current generation circuit 6 superimposes a current pulse Ic on a current of a load 2 and changes a voltage digital value to be output from the AD converter. A gain/offset corrector 8 executes signal processing on change in the voltage digital value caused by the reference current generation circuit 6 to dynamically acquire the gain a and the offset b that are used in an equation that indicates a linear relationship between the voltage digital value output from the AD converter 23 and the current digital value of the load.

Abstract: This invention provides a current control semiconductor element in which dependence of a sense ratio on a temperature distribution is eliminated and the accuracy of current detection using a sense MOSFET can be improved, and to provide a control device using the current control semiconductor element. The current control semiconductor element 1 includes a main MOSFET 7 that drives a current and a sense MOSFET 8 that is connected to the main MOSFET in parallel and detects a current shunted from a current of the main MOSFET. The main MOSFET is formed using a multi-finger MOSFET that has a plurality of channels and is arranged in a row. When a distance between the center of the multi-finger MOSFET 7 and a channel located farthest from the center of the multi-finger MOSFET 7 is indicated by L, a channel that is located closest to a position distant by a distance of (L/(?3)) from the center of the multi-finger MOSFET is used as a channel for the sense MOSFET 8.

Abstract: A current-controlled semiconductor device is provided which corrects fluctuations of both gain and offset of a current detection circuit to thereby enable high-accuracy current detection within a single-chip IC. The current-controlled semiconductor device is provided on the same semiconductor chip with a MOSFET, two constant current sources, and a current detection circuit which detects a current of the MOSFET and currents of the constant current sources. Further, the constant current sources are equipped with an external connecting terminal for measuring their current values. A correction measured-value holding register holds therein the current values of the constant current sources, which have been measured from outside.

Abstract: An electronic control apparatus includes a control unit 2; a plurality of power supply units 1-1, 1-2 for supplying the control unit 2 with power; and a power supply fault detector unit 3 for detecting a fault in the plurality of power supply units 1-1, 1-2. The control unit 2 operates in a normal mode on electric power supplied from the plurality of power supply units 1-1, 1-2, when none of the plurality of power supply units 1-1, 1-2 is faulty. If at least one of the plurality of power supply units 1-1, 1-2 is faulty, the control unit 2 operates in an energy saving mode in which less power is consumed on electric power supplied from the power supply unit that remains fully operational. Thereby an electronic control apparatus is obtained that enables continued operation during a faulty condition, while preventing circuit scale, dimensions, weight, and cost from increasing.

Abstract: A current regulator has a current regulating semiconductor device and a microcontroller which outputs a PWM pulse for driving a load to the current regulating semiconductor device and receives outputs of a high-side current detection circuit and a low-side current detection circuit from the current regulating semiconductor device. An output mixer of the current regulating semiconductor device switches, in synchronization with the PWM pulse, between the output of the high-side current detection circuit and the output of the low-side current detection circuit on one signal line to output the output to the microcontroller.

Abstract: A microcontroller includes a central processing unit, a PWM signal generation unit which generates a PWM signal according to a generation condition of a PWM signal set by the central processing unit, and a diagnostic unit which inputs the generated PWM signal therein and detects a pulse period and a pulse width, based on the input signal and which determines whether the detected pulse period and pulse width respectively coincide with a pulse period and a pulse width corresponding to the generation condition.

Abstract: A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The microcontroller has a plurality of processing systems made up of a first CPU, a second CPU, a first memory and a second memory, and for the instruction processing about specific processing set in advance, the write to peripheral modules which are not multiplexed is executed twice, and the write data of the first time and the second time are mutually collated.

Abstract: A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The microcontroller has a plurality of processing systems made up of a first CPU, a second CPU, a first memory and a second memory, and for the instruction processing about specific processing set in advance, the write to peripheral modules which are not multiplexed is executed twice, and the write data of the first time and the second time are mutually collated.