Patents by Inventor Nobuyasu Shishido

Nobuyasu Shishido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and fabrication method thereof
    Patent number: 6229196
    Abstract: The semiconductor device includes a semiconductor base body (11) formed of a damaged layer (102) serving as a gettering layer, a P+ collector layer (103), an N+ buffer layer (104), and an N− layer (105) laid one on top of another, a gate electrode (27) selectively formed on the upper main surface of the semiconductor base body (11) specifically on the external main surface of the N− layer (105), with a gate insulating film (26) interposed therebetween, an emitter electrode (28) selectively formed on the upper main surface of the semiconductor base body (11), and a collector electrode (106) formed on the lower main surface of the semiconductor base body (11), specifically on the external main surface of the damaged layer (102).
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: May 8, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuyasu Shishido, Mitsuyoshi Takeda, Yoshifumi Tomomatsu