Patents by Inventor Nobuyo Sugiyama

Nobuyo Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6982456
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: January 3, 2006
    Assignee: Matsushita Electic Industrial Co., Ltd.
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura
  • Publication number: 20040246803
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Application
    Filed: July 13, 2004
    Publication date: December 9, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura
  • Patent number: 6803623
    Abstract: The nonvolatile semiconductor memory device has a floating gate electrode that is formed on the semiconductor region and stores carriers injected from the semiconductor region and a control gate electrode that controls the quantity of stored carriers by applying a predetermined voltage to the floating gate electrode. The source region is formed in the semiconductor region on one of side regions of the floating gate electrode and control gate electrode, while the drain region is formed on the other of the side regions thereof. The drain region creates an electric field from which the carriers injected into the floating gate electrode are subject to an external force having an element directed from the semiconductor region to the floating gate electrode.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: October 12, 2004
    Assignees: Matsushita Electric Industrial Co., Ltd., Halo LSI Design and Device Technologies Inc.
    Inventors: Nobuyo Sugiyama, Shinji Odanaka, Hiromasa Fujimoto, Seiki Ogura
  • Patent number: 6770931
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 3, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura
  • Publication number: 20030122180
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Application
    Filed: February 14, 2003
    Publication date: July 3, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura
  • Patent number: 6538275
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura
  • Publication number: 20020074583
    Abstract: The nonvolatile semiconductor memory device has a floating gate electrode that is formed on the semiconductor region and stores carriers injected from the semiconductor region and a control gate electrode that controls the quantity of stored carriers by applying a predetermined voltage to the floating gate electrode. The source region is formed in the semiconductor region on one of side regions of the floating gate electrode and control gate electrode, while the drain region is formed on the other of the side regions thereof. The drain region creates an electric field from which the carriers injected into the floating gate electrode are subject to an external force having an element directed from the semiconductor region to the floating gate electrode.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 20, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyo Sugiyama, Shinji Odanaka, Hiromasa Fujimoto, Seiki Ogura
  • Publication number: 20020070405
    Abstract: A nonvolatile semiconductor memory device according to the present invention has a control gate electrode which is formed on the upper stage of a stepped portion formed in the principal surface of a substrate with a first insulating film interposed therebetween and a floating gate electrode which is formed to cover up the stepped portion, capacitively coupled to the side surface of the control gate electrode closer to the stepped portion with a second insulating film interposed therebetween, and opposed to the lower stage of the stepped portion with a third insulating film serving as a tunnel film interposed therebetween.
    Type: Application
    Filed: July 12, 2001
    Publication date: June 13, 2002
    Inventors: Nobuyo Sugiyama, Hiromasa Fujimoto, Shinji Odanaka, Seiki Ogura