Patents by Inventor Nobuyoshi Nara

Nobuyoshi Nara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NONVOLATILE MEMORY DEVICE
    Publication number: 20110273939
    Abstract: A nonvolatile memory device includes a nonvolatile memory and a controller unit for the nonvolatile memory. The nonvolatile memory and the controller unit include a first logic section and a second logic section, respectively. The nonvolatile memory includes a voltage detector configured to detect a power supply voltage externally supplied to the nonvolatile memory and the controller unit, and an output of the detection is supplied to the first logic section of the nonvolatile memory provided with the voltage detector, and also to the second logic section of the controller unit and/or a logic section of at least one added nonvolatile memory via a buffer amplifier, simultaneously.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 10, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuya MURAKAMI, Nobuyoshi Nara, Kenichi Imamiya
  • Nonvolatile memory device
    Patent number: 8023355
    Abstract: A nonvolatile memory device includes a nonvolatile memory and a controller unit for the nonvolatile memory. The nonvolatile memory and the controller unit include a first logic section and a second logic section, respectively. The nonvolatile memory includes a voltage detector configured to detect a power supply voltage externally supplied to the nonvolatile memory and the controller unit, and an output of the detection is supplied to the first logic section of the nonvolatile memory provided with the voltage detector, and also to the second logic section of the controller unit and/or a logic section of at least one added nonvolatile memory via a buffer amplifier, simultaneously.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: September 20, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Murakami, Nobuyoshi Nara, Kenichi Imamiya
  • Semiconductor device and memory card having the same
    Patent number: 7744006
    Abstract: A semiconductor device includes a first circuit which operates in accordance with an internal clock, a second circuit which generates information of which an external apparatus is to be notified, an interface section which notifies the external apparatus of the information generated by the second circuit without using the first circuit upon receiving a predetermined command from the external apparatus, and a plurality of terminals each of which is connectable to one of power terminals and ground terminals provided on a substrate. The information is determined depending on whether each of the plurality of terminals is electrically connected to the power terminal or ground terminal on the substrate.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: June 29, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nobuyoshi Nara
  • NONVOLATILE MEMORY DEVICE
    Publication number: 20090154280
    Abstract: A nonvolatile memory device includes a nonvolatile memory and a controller unit for the nonvolatile memory. The nonvolatile memory and the controller unit include a first logic section and a second logic section, respectively. The nonvolatile memory includes a voltage detector configured to detect a power supply voltage externally supplied to the nonvolatile memory and the controller unit, and an output of the detection is supplied to the first logic section of the nonvolatile memory provided with the voltage detector, and also to the second logic section of the controller unit and/or a logic section of at least one added nonvolatile memory via a buffer amplifier, simultaneously.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 18, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuya MURAKAMI, Nobuyoshi Nara, Kenichi Imamiya
  • SEMICONDUCTOR DEVICE AND MEMORY CARD HAVING THE SAME
    Publication number: 20090008461
    Abstract: A semiconductor device includes a first circuit which operates in accordance with an internal clock, a second circuit which generates information of which an external apparatus is to be notified, an interface section which notifies the external apparatus of the information generated by the second circuit without using the first circuit upon receiving a predetermined command from the external apparatus, and a plurality of terminals each of which is connectable to one of power terminals and ground terminals provided on a substrate. The information is determined depending on whether each of the plurality of terminals is electrically connected to the power terminal or ground terminal on the substrate.
    Type: Application
    Filed: May 5, 2008
    Publication date: January 8, 2009
    Inventor: Nobuyoshi NARA
  • Semiconductor device and memory card having the same
    Patent number: 7370810
    Abstract: A semiconductor device includes a first circuit which operates in accordance with an internal clock, a second circuit which generates information of which an external apparatus is to be notified, an interface section which notifies the external apparatus of the information generated by the second circuit without using the first circuit upon receiving a predetermined command from the external apparatus, and a plurality of terminals each of which is connectable to one of power terminals and ground terminals provided on a substrate. The information is determined depending on whether each of the plurality of terminals is electrically connected to the power terminal or ground terminal on the substrate.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: May 13, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nobuyoshi Nara
  • Semiconductor device and memory card having the same
    Publication number: 20060289660
    Abstract: A semiconductor device includes a first circuit which operates in accordance with an internal clock, a second circuit which generates information of which an external apparatus is to be notified, an interface section which notifies the external apparatus of the information generated by the second circuit without using the first circuit upon receiving a predetermined command from the external apparatus, and a plurality of terminals each of which is connectable to one of power terminals and ground terminals provided on a substrate. The information is determined depending on whether each of the plurality of terminals is electrically connected to the power terminal or ground terminal on the substrate.
    Type: Application
    Filed: August 31, 2006
    Publication date: December 28, 2006
    Inventor: Nobuyoshi Nara