Abstract: In an ECU in which a sensor IC and various engine control devices are mounted on a board in a case, the sensor IC has a pressure sensor element covered with mold resin having a pressure introduction hole extending outward from the pressure sensor element so as to open to an outer surface thereof. A cylindrical resilient member is disposed and resiliently deformed between an inner wall of the case and the outer surface of the mold resin so as to allow a pressure introduction inlet formed in the case to communicate with the pressure introduction hole and not to communicate with places where the engine control devices are mounted. The case of ECU is fixed to a surge tank so that a pressure introduction outlet formed in the surge tank communicates directly with the pressure introduction inlet.

Abstract: In ECU in which a sensor IC and various engine control devices are mounted on a board in a case, the sensor IC has a pressure sensor element covered with mold resin having a pressure introduction hole extending outward from the pressure sensor element so as to open to an outer surface thereof. A cylindrical resilient member is disposed and resiliently deformed between an inner wall of the case and the outer surface of the mold resin so as to allow a pressure introduction inlet formed in the case to communicate with the pressure introduction hole and not to communicate with places where the engine control devices are mounted. The case of ECU is fixed to a surge tank so that a pressure introduction outlet formed in the surge tank communicates directly with the pressure introduction inlet.

Abstract: A memory device has an address terminal for inputting a plural bits of address signal, and a chip select terminal for inputting an external chip select signal, and an access mode controlling circuit which can switch a first control mode for controlling enable/disable of memory device according to plural external chip select signals and a predetermined address signal in the address signal to be input, and a second control mode for controlling the enable/disable according to a single external chip select signal. If the memory device is larger than a first memory area which can be controlled by a single chip select signal, the memory device can be directly connected to the memory control unit by setting the access mode control circuit to the first control mode. If the memory device is less than the first memory area, the access mode control circuit is set to the second control mode.

Abstract: A memory device has an address terminal for inputting a plural bits of address signal, and a chip select terminal for inputting an external chip select signal, and an access mode controlling circuit which can switch a first control mode for controlling enable/disable of memory device according to plural external chip select signals and a predetermined address signal in the address signal to be input, and a second control mode for controlling the enable/disable according to a single external chip select signal. If the memory device is larger than a first memory area which can be controlled by a single chip select signal, the memory device can be directly connected to the memory control unit by setting the access mode control circuit to the first control mode. If the memory device is less than the first memory area, the access mode control circuit is set to the second control mode.

Abstract: The invention aims at securely generating an internal supply voltage when turning on the power supply of internal circuits in a semiconductor integrated circuit where the operation voltage is low, and securely resetting the internal circuits. The voltage generator generates an internal supply voltage supplied to the internal circuits based on the reference voltage by using the external supply voltage supplied from the exterior. That is, the voltage generator forcibly supplies the external supply voltage as internal supply voltage when the power-on reset signal is activated. Therefore, when the external supply voltage is low at the time of turning-on of the power, and the voltage generator does not operate normally, the internal supply voltage can be securely generated following the external supply voltage so as to be supplied to the internal circuits.

Abstract: The invention aims at securely generating an internal supply voltage when turning on the power supply of internal circuits in a semiconductor integrated circuit where the operation voltage is low, and securely resetting the internal circuits. The voltage generator generates an internal supply voltage supplied to the internal circuits based on the reference voltage by using the external supply voltage supplied from the exterior. That is, the voltage generator forcibly supplies the external supply voltage as internal supply voltage when the power-on reset signal is activated. Therefore, when the external supply voltage is low at the time of turning-on of the power, and the voltage generator does not operate normally, the internal supply voltage can be securely generated following the external supply voltage so as to be supplied to the internal circuits.

Abstract: The adjustment control circuit activates the first adjustment signal that adjusts the characteristic of an internal circuit in response to an adjustment signal from the exterior. The ROM circuit activates the second adjustment signal that adjusts the characteristic of the internal circuit when information to adjust the characteristics of the internal circuits is programmed. The selecting circuit outputs either of the first or the second adjustment signal in response to a control signal. The characteristics of the internal circuits are adjusted in response to either the first or the second adjustment signal. Therefore, the second adjustment signal is masked by the selecting circuit selecting the first adjustment signal. That is, at this time, the information programmed in advance in the ROM circuit is invalidated. Further, where no information is programmed in the ROM circuit, the characteristics of the internal circuits can be adjusted without programming the ROM circuit.

Abstract: The invention aims at securely generating an internal supply voltage when turning on the power supply of internal circuits in a semiconductor integrated circuit where the operation voltage is low, and securely resetting the internal circuits. The voltage generator generates an internal supply voltage supplied to the internal circuits based on the reference voltage by using the external supply voltage supplied from the exterior. That is, the voltage generator forcibly supplies the external supply voltage as internal supply voltage when the power-on reset signal is activated. Therefore, when the external supply voltage is low at the time of turning-on of the power, and the voltage generator does not operate normally, the internal supply voltage can be securely generated following the external supply voltage so as to be supplied to the internal circuits.

Abstract: The adjustment control circuit activates the first adjustment signal that adjusts the characteristic of an internal circuit in response to an adjustment signal from the exterior. The ROM circuit activates the second adjustment signal that adjusts the characteristic of the internal circuit when information to adjust the characteristics of the internal circuits is programmed. The selecting circuit outputs either of the first or the second adjustment signal in response to a control signal. The characteristics of the internal circuits are adjusted in response to either the first or the second adjustment signal. Therefore, the second adjustment signal is masked by the selecting circuit selecting the first adjustment signal. That is, at this time, the information programmed in advance in the ROM circuit is invalidated. Further, where no information is programmed in the ROM circuit, the characteristics of the internal circuits can be adjusted without programming the ROM circuit.