Patents by Inventor Nobuyuki Ishige

Nobuyuki Ishige has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12170290
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: January 12, 2024
    Date of Patent: December 17, 2024
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Patent number: 12074173
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: August 27, 2024
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Patent number: 12008973
    Abstract: An area of a region arranged on one side of a display region in a direction in which scanning lines extend is reduced. A display apparatus has a scanning line driving circuit and a plurality of scanning lines. The scanning line driving circuit is provided in a region arranged along a side portion on the positive side in the X-axis direction in a display region of a substrate. The scanning line driving circuit includes a plurality of transfer circuits connected to the plurality of scanning lines, respectively. Among the plurality of transfer circuits, the shape of one transfer circuit is different from the shape of another transfer circuit arranged on the negative side of the one transfer circuit in the Y-axis direction.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: June 11, 2024
    Assignee: Japan Display Inc.
    Inventor: Nobuyuki Ishige
  • Publication number: 20240153964
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki MURASE, Nobuyuki ISHIGE
  • Publication number: 20230178566
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: February 2, 2023
    Publication date: June 8, 2023
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki MURASE, Nobuyuki ISHIGE
  • Patent number: 11600641
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: March 7, 2023
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Patent number: 11402704
    Abstract: A circuit section of a display device is provided with a display element section on which a plurality of display elements are arranged at positions overlapped with a display region on which a display functional layer is formed, an input section for transmitting a signal for driving the display functional layer to the display element section and a lead-out wiring section for electrically connecting the display element section to the input section. Moreover, the lead-out wiring section is provided with a plurality of stacked wiring layers, and the plurality of wiring layers include a first wiring layer on which a plurality of first wirings having a first wiring width and a second wiring layer on which a plurality of second wirings having a first wiring width that is narrower than the first wiring width are formed.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: August 2, 2022
    Assignee: JAPAN DISPLAY INC.
    Inventor: Nobuyuki Ishige
  • Publication number: 20220068974
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: November 10, 2021
    Publication date: March 3, 2022
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki MURASE, Nobuyuki ISHIGE
  • Patent number: 11205665
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: December 21, 2021
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Publication number: 20210343256
    Abstract: An area of a region arranged on one side of a display region in a direction in which scanning lines extend is reduced. A display apparatus has a scanning line driving circuit and a plurality of scanning lines. The scanning line driving circuit is provided in a region arranged along a side portion on the positive side in the X-axis direction in a display region of a substrate. The scanning line driving circuit includes a plurality of transfer circuits connected to the plurality of scanning lines, respectively. Among the plurality of transfer circuits, the shape of one transfer circuit is different from the shape of another transfer circuit arranged on the negative side of the one transfer circuit in the Y-axis direction.
    Type: Application
    Filed: July 13, 2021
    Publication date: November 4, 2021
    Applicant: Japan Display Inc.
    Inventor: Nobuyuki ISHIGE
  • Patent number: 11094278
    Abstract: An area of a region arranged on one side of a display region in a direction in which scanning lines extend is reduced. A display apparatus has a scanning line driving circuit and a plurality of scanning lines. The scanning line driving circuit is provided in a region arranged along a side portion on the positive side in the X-axis direction in a display region of a substrate. The scanning line driving circuit includes a plurality of transfer circuits connected to the plurality of scanning lines, respectively. Among the plurality of transfer circuits, the shape of one transfer circuit is different from the shape of another transfer circuit arranged on the negative side of the one transfer circuit in the Y-axis direction.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: August 17, 2021
    Assignee: Japan Display Inc.
    Inventor: Nobuyuki Ishige
  • Publication number: 20210103169
    Abstract: A circuit section of a display device is provided with a display element section on which a plurality of display elements are arranged at positions overlapped with a display region on which a display functional layer is formed, an input section for transmitting a signal for driving the display functional layer to the display element section and a lead-out wiring section for electrically connecting the display element section to the input section. Moreover, the lead-out wiring section is provided with a plurality of stacked wiring layers, and the plurality of wiring layers include a first wiring layer on which a plurality of first wirings having a first wiring width and a second wiring layer on which a plurality of second wirings having a first wiring width that is narrower than the first wiring width are formed.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 8, 2021
    Applicant: JAPAN DISPLAY INC.
    Inventor: Nobuyuki ISHIGE
  • Patent number: 10895789
    Abstract: A circuit section of a display device is provided with a display element section on which a plurality of display elements are arranged at positions overlapped with a display region on which a display functional layer is formed, an input section for transmitting a signal for driving the display functional layer to the display element section and a lead-out wiring section for electrically connecting the display element section to the input section. Moreover, the lead-out wiring section is provided with a plurality of stacked wiring layers, and the plurality of wiring layers include a first wiring layer on which a plurality of first wirings having a first wiring width and a second wiring layer on which a plurality of second wirings having a first wiring width that is narrower than the first wiring width are formed.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: January 19, 2021
    Assignee: Japan Display Inc.
    Inventor: Nobuyuki Ishige
  • Publication number: 20200388638
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki MURASE, Nobuyuki ISHIGE
  • Patent number: 10790316
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: September 29, 2020
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Publication number: 20200176488
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki MURASE, Nobuyuki ISHIGE
  • Publication number: 20200103686
    Abstract: A circuit section of a display device is provided with a display element section on which a plurality of display elements are arranged at positions overlapped with a display region on which a display functional layer is formed, an input section for transmitting a signal for driving the display functional layer to the display element section and a lead-out wiring section for electrically connecting the display element section to the input section. Moreover, the lead-out wiring section is provided with a plurality of stacked wiring layers, and the plurality of wiring layers include a first wiring layer on which a plurality of first wirings having a first wiring width and a second wiring layer on which a plurality of second wirings having a first wiring width that is narrower than the first wiring width are formed.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Applicant: Japan Display Inc.
    Inventor: Nobuyuki Ishige
  • Patent number: 10600822
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 24, 2020
    Assignee: Japan Display Inc.
    Inventors: Gen Koide, Masaki Murase, Nobuyuki Ishige
  • Patent number: 10558096
    Abstract: A circuit section of a display device is provided with a display element section on which a plurality of display elements are arranged at positions overlapped with a display region on which a display functional layer is formed, an input section for transmitting a signal for driving the display functional layer to the display element section and a lead-out wiring section for electrically connecting the display element section to the input section. Moreover, the lead-out wiring section is provided with a plurality of stacked wiring layers, and the plurality of wiring layers include a first wiring layer on which a plurality of first wirings having a first wiring width and a second wiring layer on which a plurality of second wirings having a first wiring width that is narrower than the first wiring width are formed.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: February 11, 2020
    Assignee: Japan Display Inc.
    Inventor: Nobuyuki Ishige
  • Publication number: 20190229134
    Abstract: In a transistor substrate of a display device, a plurality of signal lines to which any one of drive signals of a gate signal and a video signal is supplied include a plurality of first signal lines to which the drive signal is supplied. The first signal line is connected to a driving driver, and is formed in an edge region positioned between an end portion of a substrate and a pixel region and in the pixel region. The first signal line is formed to pass through a first wiring formed in a first layer from a second wiring formed in a second layer in the edge region.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 25, 2019
    Applicant: Japan Display Inc.
    Inventors: Gen KOIDE, Masaki Murase, Nobuyuki Ishige