Patents by Inventor Nobuyuki Ogata

Nobuyuki Ogata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10910032
    Abstract: A memory device includes a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers. The memory device also includes a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a write current to the magnetoresistive element. A first write current in the first writing includes a first pulse and a second pulse added to the first pulse. A width of the second pulse is smaller than a width of the first pulse, and a current level of the second pulse is different from a current level of the first pulse.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: February 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya Kishi, Tsuneo Inaba, Daisuke Watanabe, Masahiko Nakayama, Nobuyuki Ogata, Masaru Toko, Hisanori Aikawa, Jyunichi Ozeki, Toshihiko Nagase, Young Min Eeh, Kazuya Sawada
  • Publication number: 20190259438
    Abstract: A memory device includes a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers. The memory device also includes a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a write current to the magnetoresistive element. A first write current in the first writing includes a first pulse and a second pulse added to the first pulse. A width of the second pulse is smaller than a width of the first pulse, and a scurrent level of the second pulse is different from a current level of the first pulse.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya KISHI, Tsuneo INABA, Daisuke WATANABE, Masahiko NAKAYAMA, Nobuyuki OGATA, Masaru TOKO, Hisanori AIKAWA, Jyunichi OZEKI, Toshihiko NAGASE, Young Min EEH, Kazuya SAWADA
  • Patent number: 10325640
    Abstract: According to one embodiment, a memory device includes: a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers; and a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a current pulse to the magnetoresistive element. A first pulse pattern used in the first writing is different from a second pulse pattern used in the second writing.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: June 18, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya Kishi, Tsuneo Inaba, Daisuke Watanabe, Masahiko Nakayama, Nobuyuki Ogata, Masaru Toko, Hisanori Aikawa, Jyunichi Ozeki, Toshihiko Nagase, Young Min Eeh, Kazuya Sawada
  • Publication number: 20180075895
    Abstract: According to one embodiment, a memory device includes: a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers; and a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a current pulse to the magnetoresistive element. A first pulse pattern used in the first writing is different from a second pulse pattern used in the second writing.
    Type: Application
    Filed: March 10, 2017
    Publication date: March 15, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuya KISHI, Tsuneo INABA, Daisuke WATANABE, Masahiko NAKAYAMA, Nobuyuki OGATA, Masaru TOKO, Hisanori AIKAWA, Jyunichi OZEKI, Toshihiko NAGASE, Young Min EEH, Kazuya SAWADA
  • Publication number: 20150263274
    Abstract: According to one embodiment, a magnetic field applying apparatus includes a stage on which a semiconductor wafer having a major surface provided with a magnetoresistive effect element is placed, and an external magnetic field supplying unit configured to supply an external magnetic field to the semiconductor wafer planed on the stage. The external magnetic field supplying unit is provided on a reverse surface side or a lateral surface side of the semiconductor wafer placed on the stage.
    Type: Application
    Filed: September 9, 2014
    Publication date: September 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio MIYATA, Kenji NOMA, Shinya KOBAYASHI, Yosuke KOBAYASHI, Masashi KAWAMURA, Nobuyuki OGATA
  • Patent number: 4681994
    Abstract: A high precision and compact contact switch which comprises a housing, a pair of fixed contact elements fixedly supported within the housing, a plunger axially slidably extending into the housing, a generally cylindrical movable contact member, a support piece for the support of the fixed contact elements and a biasing spring. The generally cylindrical movable contact member is tiltably carried by the plunger so as to extend transversely in relation to the plunger. The support piece is preferably made out of synthetic resin. The biasing spring is used for urging the opposite end portions of the movable contact member in order to contact the respective fixed contact elements.
    Type: Grant
    Filed: November 7, 1985
    Date of Patent: July 21, 1987
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Kunio Nagata, Tatsuo Aoi, Norio Iwakiri, Hiroshi Osumi, Nobuyuki Ogata, Norihito Yamane