Abstract: Upon requesting message passing in a multiprocessing system, a requesting processor sends a request to a set of the other processors in the multiprocessor system. The number of processors in a subset of the set of other processors is defined by an upper limit UNR and a lower limit LNR. A counter in the requesting processor counts acknowledgement signals from the other destination processors, and a comparator compares the count value of the counter with the lower and higher limit values. If the count value is not less than the lower limit value, the requesting processor performs message passing by sending a message to a number of destination processors up to the value of the upper limit.

Abstract: In a tightly coupled multiprocessor system, I/O interrupts are distributed to respective processors in accordance with load conditions of the processors without partiality to any one processor. Interrupt arbitration circuits provided in respective processors receive an interrupt request from an I/O device, effect interrupt arbitration using a parameter indicating the load condition of each processor as a first interrupt priority. If the arbitration fails to determine a sole processor, additional arbitration finally selects a sole processor P on the basis of the second interrupt priority which is varied circularly.