Patents by Inventor Nobuyuki Orita

Nobuyuki Orita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080191990
    Abstract: A driver includes a first memory including a plurality of memory cells and redundant memory cells. An address control circuit replaces a defective memory cell of the plurality of memory cells with one of the redundant memory cells based on a defect address data indicating an address of the defective memory cell. A driving circuit displays on a display panel, a display data stored in the first memory based on a display quality specifying data specifying display quality of the display panel. The display quality specifying data and the defect address data are stored in a second memory.
    Type: Application
    Filed: February 6, 2008
    Publication date: August 14, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Hiroyuki MATSUBARA, Hiroyuki TAKAHASHI, Nobuyuki ORITA, Toshiharu OKAMOTO, Shuuichi SENOU
  • Patent number: 5943286
    Abstract: A memory device includes a memory cell block, a reference cell block and a comparator. The memory cell block includes a plurality of cells, and a memory bit line is connected to a selected one of the cells. The reference cell block includes a plurality of cells, and a reference bit line is connected to a predetermined number of cells which are connected in series. The comparator compares a memory signal received from the memory bit line to a reference signal received from the reference bit line to determine a bit data of the selected cell.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: August 24, 1999
    Assignee: NEC Corporation
    Inventor: Nobuyuki Orita