Patents by Inventor Nobuyuki TAYA

Nobuyuki TAYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942040
    Abstract: In a display device having a non-rectangular display unit, occurrence of a difference in luminance between a region with a high load and a region with a low load is suppressed. A region inside the display unit is segmented into a high-load region with a high load on horizontal scanning lines (an initialization control line and a write control line) and a low-load region with a low load on horizontal scanning lines. An initialization control line and a write control line that are disposed in the high-load region are driven by a discharge driver and a scan driver, respectively. An initialization control line and a write control line that are disposed in the low-load region both are driven by, for example, the discharge driver.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: March 26, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Makoto Yokoyama, Nobuyuki Taya, Junichi Yamada
  • Patent number: 11830437
    Abstract: Narrowing of a picture-frame of a display device that can perform switching between vertical scanning directions is implemented. A gate driver (21) includes a shift register (211) including a plurality of unit circuits including n unit circuits connected to write control lines; a first scanning order switching circuit (212) including a plurality of first switching circuits respectively corresponding to the plurality of unit circuits; and a second scanning order switching circuit (213) including n second switching circuits connected to initialization control lines. The first scanning order switching circuit (212) controls operation of the shift register (211) based on scanning order instruction signals. Each second switching circuit applies, based on the scanning order instruction signals, an output signal from a unit circuit on a previous stage side or an output signal from a unit circuit on a subsequent stage side, as a second scanning signal, to an initialization control line.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: November 28, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Makoto Yokoyama, Nobuyuki Taya
  • Publication number: 20230335061
    Abstract: The scanning line drive circuit has a configuration in which a plurality of unit circuits are connected in multiple stages. A unit circuit includes: a first transistor having a first conductive terminal to which a first-level voltage is applied and a second conductive terminal connected to a first node; a second transistor having a second conductive terminal to which a second-level voltage is applied; a third transistor having a first conductive terminal connected to the first node and a second conductive terminal connected to a first conductive terminal of the second transistor; a fourth transistor having a first conductive terminal connected to a control terminal of the third transistor, and having a second conductive terminal and a control terminal to both of which the second-level voltage is applied; and an output transistor having a control terminal connected to the first node and a second conductive terminal connected to an output terminal.
    Type: Application
    Filed: October 2, 2020
    Publication date: October 19, 2023
    Inventors: Nobuyuki TAYA, Makoto YOKOYAMA, Naoki UEDA
  • Publication number: 20230222981
    Abstract: Narrowing of a picture-frame of a display device that can perform switching between vertical scanning directions is implemented. A gate driver (21) includes a shift register (211) including a plurality of unit circuits including n unit circuits connected to write control lines; a first scanning order switching circuit (212) including a plurality of first switching circuits respectively corresponding to the plurality of unit circuits; and a second scanning order switching circuit (213) including n second switching circuits connected to initialization control lines. The first scanning order switching circuit (212) controls operation of the shift register (211) based on scanning order instruction signals. Each second switching circuit applies, based on the scanning order instruction signals, an output signal from a unit circuit on a previous stage side or an output signal from a unit circuit on a subsequent stage side, as a second scanning signal, to an initialization control line.
    Type: Application
    Filed: July 17, 2020
    Publication date: July 13, 2023
    Inventors: Makoto YOKOYAMA, Nobuyuki TAYA
  • Publication number: 20230024395
    Abstract: In a display device having a non-rectangular display unit, occurrence of a difference in luminance between a region with a high load and a region with a low load is suppressed. A region inside the display unit is segmented into a high-load region with a high load on horizontal scanning lines (an initialization control line and a write control line) and a low-load region with a low load on horizontal scanning lines. An initialization control line and a write control line that are disposed in the high-load region are driven by a discharge driver and a scan driver, respectively. An initialization control line and a write control line that are disposed in the low-load region both are driven by, for example, the discharge driver.
    Type: Application
    Filed: December 13, 2019
    Publication date: January 26, 2023
    Inventors: Makoto YOKOYAMA, Nobuyuki TAYA, Junichi YAMADA
  • Patent number: 11386848
    Abstract: As a scanning line drive circuit of a display device, a shift register having a configuration in which a plurality of unit circuits are connected to each other in multiple stages is used. The unit circuits each include: a plurality of control transistors; an internal node connected to a terminal of one of the plurality of control transistors; and a depletion mode initialization transistor having a first conduction terminal connected directly or through a resistor to the internal node, a second conduction terminal, and a control terminal. One of a power supply voltage and a ground voltage is applied to the second conduction terminal, and the other voltage is applied to the control terminal. The initialization transistor is turned on in a power-off state.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: July 12, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Nobuyuki Taya
  • Publication number: 20220028342
    Abstract: As a scanning line drive circuit of a display device, a shift register having a configuration in which a plurality of unit circuits are connected to each other in multiple stages is used. The unit circuits each include: a plurality of control transistors; an internal node connected to a terminal of one of the plurality of control transistors; and a depression mode initialization transistor having a first conduction terminal connected directly or through a resistor to the internal node, a second conduction terminal, and a control terminal. One of a power supply voltage and a ground voltage is applied to the second conduction terminal, and the other voltage is applied to the control terminal. The initialization transistor is turned on in a power-off state.
    Type: Application
    Filed: December 5, 2018
    Publication date: January 27, 2022
    Inventor: Nobuyuki TAYA