Patents by Inventor Nobuyuki Yamamura
Nobuyuki Yamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7349041Abstract: Disclosed is an ultra slimmed LCD capable of being applied to a hand-held terminal such as a cellular phone. In the LCD, a first substrate includes a pixel electrode. A switching element is formed on an inner surface of the first substrate, and turns on or off the pixel electrode. A first polarizing plate is attached on an outer surface of the first substrate. A second substrate faces the first substrate, and includes a color filter layer for displaying a color image. A common electrode is formed on the color filter layer. The second substrate converts a linear light input through one side face of the second substrate into a planar light. A liquid crystal layer is interposed between the first substrate and the second substrate. A second polarizing plate is arranged between the liquid crystal layer and the second substrate, and converts the planar light converted through the second substrate into a light vibrating in a predetermined direction.Type: GrantFiled: April 25, 2002Date of Patent: March 25, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Nobuyuki Yamamura
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Publication number: 20030067565Abstract: Disclosed is an ultra slimmed LCD capable of being applied to a hand-held terminal such as a cellular phone. In the LCD, a first substrate includes a pixel electrode. A switching element is formed on an inner surface of the first substrate, and turns on or off the pixel electrode. A first polarizing plate is attached on an outer surface of the first substrate. A second substrate faces the first substrate, and includes a color filter layer for displaying a color image. A common electrode is formed on the color filter layer. The second substrate converts a linear light input through one side face of the second substrate into a planar light. A liquid crystal layer is interposed between the first substrate and the second substrate. A second polarizing plate is arranged between the liquid crystal layer and the second substrate, and converts the planar light converted through the second substrate into a light vibrating in a predetermined direction.Type: ApplicationFiled: April 25, 2002Publication date: April 10, 2003Inventor: Nobuyuki Yamamura
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Patent number: 5729316Abstract: Described in this invention is a liquid crystal display module (LCD module) in which a printed circuit board has the step structure therein, while forming an extension, and the partial and entire wires of the gradation voltage or the color signals are arrayed on the extension in one or more layers. This LCD module can be used for semiconductor devices requiring a compact LCD panel of high quality and small size.Type: GrantFiled: July 3, 1995Date of Patent: March 17, 1998Assignee: Samsung Electronics Co., Ltd.Inventors: Nobuyuki Yamamura, Seok-Tae Kim
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Patent number: 5663575Abstract: A liquid crystal display is provided with a high aperture ratio which solves the disadvantages of crossover short and limited viewing angle by using a transparent conductive electrode as a lower electrode of a gate line and a storage capacitor. The transparent conductive electrode has a plurality of sections removed so as to form a ladder or mesh structure. An anodic oxidative metal is deposited on the whole surface of the transparent conductive film after forming a gate electrode, thus making the whole surface of the transparent conductive film anodized. The thin film transistors of the LCD have a uniform surface.Type: GrantFiled: June 21, 1995Date of Patent: September 2, 1997Assignee: Samsung Electronics Co., Ltd.Inventors: Nobuyuki Yamamura, In-sik Jang
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Patent number: 5484627Abstract: A method of obtaining a multi-level liquid crystal device repeatedly applies a sublimation material layer and then an insulating layer. Thereafter, the sublimation material layer is removed via heating, escaping through holes placed in the layered structure, leaving empty layered spaces into which liquid crystal can be filled.Type: GrantFiled: August 24, 1993Date of Patent: January 16, 1996Assignee: Samsung Electronics Co., Ltd.Inventors: In-sik Jang, Nobuyuki Yamamura
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Patent number: 5477973Abstract: The present invention provides a method of forming a LCD in which the dissolution layer can be dissolved without the use of a strong etchant. The method according to the present invention uses alternating insulating layers and dissolution layers that are formed of different polymer resins. The polymer resin used for the insulting layer cannot be dissolved with a predetermined etchant, whereas the polymer resin used for the dissolution layer can be dissolved using the predetermined etchant. The predetermined etchant most advantageously used is water. A specific embodiment of the invention uses arabic rubber as the dissolution layer.Type: GrantFiled: September 30, 1993Date of Patent: December 26, 1995Assignee: Samsung Electronics Co., Ltd.Inventors: In-sik Jang, Nobuyuki Yamamura
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Patent number: 5463481Abstract: An LCD having quick response time and sharp contrast provides for a dense white display when using a reflective-type LCD and the desired color density when using a backlight. This LCD is made up of a plurality of field-effect type liquid crystal layers alternately stacked with light-transmitting electrically insulating material layers. The thickness of each liquid crystal layer is desirably less than 3 .mu.m, and that of each electrically insulating material layer is desirably less than 5 .mu.m. The electrically insulating material employs a semiconductor, a metal oxide, or a light-transmitting electrically insulating resin including epoxy resin and acryl resin. The field-effect type LCD is desirably a nematic, phase-transition or ferroelectric type LCD. The total thickness of the LCD is desirably more than 1 .mu.m.Type: GrantFiled: May 10, 1993Date of Patent: October 31, 1995Assignee: Samsung Electronics Co., Ltd.Inventor: Nobuyuki Yamamura
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Patent number: 5414543Abstract: A method of obtaining a multi-level liquid crystal device repeatedly applies a metal layer and then oxidizes a portion of that metal layer. Thereafter, the non-oxidized layers are removed, leaving empty layered spaces into which liquid crystal can be filled.Type: GrantFiled: August 24, 1993Date of Patent: May 9, 1995Assignee: Samsung Electronics Co., Ltd.Inventors: In-sik Jang, Nobuyuki Yamamura
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Patent number: 5327001Abstract: A TFT array has a plurality of gate lines and a plurality of drain lines formed on a transparent insulating substrate. The gate lines intersect with the drain lines. TFTs are formed at the intersections of the gate lines and the drain lines. An opaque film is formed above the gate lines, the drain lines, and the TFTs, allowing no passage of light passing through the gaps between the transparent electrode, on the one hand, and the gate and drain lines, on the other hand. Therefore, when the TFT array is incorporated into a liquid-crystal display, the display will display high-contrast images.Type: GrantFiled: April 1, 1993Date of Patent: July 5, 1994Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 5270567Abstract: In this film transistor used for a liquid crystal display element, etc., the source and drain electrodes are formed at positions which do not overlap the gate electrode. Capacitances between the gate and source electrodes and between the gate and drain electrodes can be almost eliminated.Type: GrantFiled: March 3, 1992Date of Patent: December 14, 1993Assignee: Casio Computer Co., Ltd.Inventors: Hisatoshi Mori, Nobuyuki Yamamura
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Patent number: 5229644Abstract: A TFT is formed on a transparent insulative substrate, and includes a gate electrode, a gate insulating film, a semiconductor film which has a channel portion, source and drain electrodes. An insulating film is formed on the TFT so as to cover at least the drain electrode and the gate insulating film. A transparent electrode is formed on at least part of insulating film except for a portion above the channel portion on the semiconductor film. The transparent electrode is electrically connected to the source electrode via a through hole which is formed on the insulating film at a position of the source electrode.Type: GrantFiled: February 5, 1992Date of Patent: July 20, 1993Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 5196912Abstract: A memory element is formed of a thin film transistor. The thin film transistor has a semiconductor layer, a source electrode electrically connected to the semiconductor layer, a drain electrode electrically connected to the semiconductor layer and formed separately from the source electrode, a gate electrode for controlling formation of a channel of the semiconductor layer, and a gate insulation film for isolating the gate electrode and the semiconductor layer from each other and causing a hysteresis in the relation between the drain current and the gate circuit. The insulation film is a silicon nitride film whose composition ratio of silicon to nitrogen is in a range of approx. 0.85 to 1.1. According to this invention, the relation between the gate voltage and the drain current can be set to have a hysteresis. Therefore, the thin film transistor can be used as a memory element.Type: GrantFiled: March 13, 1991Date of Patent: March 23, 1993Assignee: Casio Computer Co., Ltd.Inventors: Hiroshi Matsumoto, Hiroyasu Yamada, Nobuyuki Yamamura, Shinichi Shimomaki, Naohiro Konya, Kyuya Baba
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Patent number: 5166085Abstract: First, a gate metal layer, a gate insulating film, a semiconductor layer, an n-type semiconductor layer, and an ohmic metal layer formed on a substrate in the order mentioned. Then, the film and the layers are patterned into those having the same shape and size. Next, a source metal layer and a drain metal layer are formed on the ohmic metal layer. Further, a portion of the ohmic metal layer, a portion of said source metal layer, and a portion of said drain metal layer are etched, thereby forming a channel portion. Finally, a transparent electrode is formed on the source metal layer, thus manufacturing a TFT. Since the film and the layer, the major components of the TFT, are sequentially formed, and are patterned simultaneously, the TFT can be manufacture with high yield. Further, since the transparent electrode is formed on the uppermost layer, i.e., the source metal layer, the pixel has a great opening ratio.Type: GrantFiled: April 2, 1990Date of Patent: November 24, 1992Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 5079606Abstract: A thin-film memory element made by the technique of forming thin film and functioning as a thin-film transistor. The memory element has two gate-insulating films, and two gate electrodes formed on the gate-insulating films, respectively. The first gate-insulating film can accumulate electrical charge, whereas the second gate-insulating film cannot. The gate electrode on the first gate-insulating film is used as write/erase electrode, and the gate electrode on the second gate-insulating film is used as read electrode. Since the memory element has two electrodes, one for writing or erasing data, and the other for reading data, its threshold voltage remains unchanged. Hence, data can be read from the thin-film memory element for a virtually indefinitely long period of time.Type: GrantFiled: January 19, 1990Date of Patent: January 7, 1992Assignee: Casio Computer Co., Ltd.Inventors: Nobuyuki Yamamura, Shinichi Shimomaki, Hideaki Shimizu, Hiroshi Matsumoto, Naoki Kato
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Patent number: 5060034Abstract: A memory device includes a memory element composed of a first thin film transistor having a memory function, and a select element composed of a second thin film transistor for selecting the memory element. A gate insulation film of the first thin film transistor has a charge storage function. A gate insulation film of the second thin film transistor does not have any charge storage function. If a plurality of the memory devices are arranged in matrix form, this configuration can be used as E.sup.2 PROM. By forming the first and second thin film transistors simultaneously, it is possible to form the first and second thin film transistors easily in the simple manufacturing steps.Type: GrantFiled: October 25, 1989Date of Patent: October 22, 1991Assignee: Casio Computer Co., Ltd.Inventors: Hideaki Shimizu, Nobuyuki Yamamura, Hiroyasu Yamada, Haruo Wakai, Hiroshi Matsumoto
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Patent number: 5057885Abstract: A memory element manufactured by a thin film forming technique is disclosed. The memory element includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode. The gate insulating film is divided into memory and non-memory regions so that a memory transistor and a selection transistor are apparently formed in one transistor. Therefore, the element formation area of each memory element can be reduced, and the packing density can be increased.Type: GrantFiled: July 20, 1990Date of Patent: October 15, 1991Assignee: Casio Computer Co., Ltd.Inventors: Hiroshi Matsumoto, Nobuyuki Yamamura, Makoto Sasaki
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Patent number: 5055899Abstract: A thin film transistor comprising a gate electrode, a gate insulating film, and a semiconductor layer, which have the same shape and the same size and stacked one upon another. The transistor further comprises an n-type semiconductor layer formed on the semiconductor layer, an ohmic electrode formed on the n-type semiconductor layer, and a source electrode and a drain electrode both formed on the ohmic electrode. Further, a transparent electrode is electrically connected to the source electrode. The thin film transistor has no step portions. Therefore, the transistor can be manufactured with high yield, and forms a pixel having a high opening ratio.Type: GrantFiled: April 2, 1990Date of Patent: October 8, 1991Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 5032883Abstract: A TFT of the present invention includes a transparent insulative substrate, a gate electrode formed on the substrate, a gate insulating film formed on at least the gate electrode, a semiconductor film formed at a position on the gate insulating film corresponding to the gate electrode, source and drain electrodes arranged on the semiconductor film so as to form a channel portion, a transparent insulating film covering the source and drain electrodes and the semiconductor film, and a transparent electrode connected to the source electrode. A through hole is formed in the transparent insulating film above the source electrode. The transparent electrode is formed on a portion of the transparent insulating film except for a portion above the channel portion on the semiconductor film.Type: GrantFiled: September 7, 1988Date of Patent: July 16, 1991Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 5003356Abstract: A TFT array having a plurality of gate lines and a plurality of drain lines formed on a transparent substrate. The gate lines intersect with the drain lines. TFT are formed at the intersections of the gate lines and the drain lines. An insulating film is formed on the drain lines and the drain electrodes of the TFTs. Pixel electrodes are formed, each overlapping the corresponding gate line and the corresponding drain line. The pixel electrode has a large area and thus, have a high opening ratio. The TFT array can, therefore, help to provide a liquid crystal display having high contrast.Type: GrantFiled: April 2, 1990Date of Patent: March 26, 1991Assignee: Casio Computer Co., Ltd.Inventors: Haruo Wakai, Nobuyuki Yamamura, Syunichi Sato, Minoru Kanbara
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Patent number: 4011577Abstract: A semiconductor mechanical-electrical transducer is obtained by providing a mechanical force applying means on a semiconductor composite comprising a semiconductor substrate, an insulating film formed on said semiconductor substrate and a film of tin oxide deposited on said insulating film and having a barrier having a rectifying characteristic. Preferably, the material of said insulating film may be selected from a group consisting of SiO.sub.2, Si.sub.3 N.sub.4 and GeO.sub.2 and the thickness of the film may be chosen to be 15 to 80A, but preferably to be 20 to 60A and more preferably to be 20 to 40A. It was discovered that such composite shows an increased reverse current response to mechanical force applied to the composite in case where the thickness of the SiO.sub.2 film has been chosen to the said particular value range. Preferably, the main surface of the substrate is made uneven.Type: GrantFiled: December 10, 1974Date of Patent: March 8, 1977Assignee: Omron Tateisi Electronics Co.Inventors: Shigeru Tanimura, Nobuyuki Yamamura, Masanobu Koide