Patents by Inventor Nobuyuki Yasutake

Nobuyuki Yasutake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6046459
    Abstract: With using one scanning stage 19 where a plurality of wafers 16A to 16E is mounted through wafer holders 20A to 20E and balancing stage 21 disposed below scanning stage 19, scanning stage 19 is scanned based on exposure data common to a plurality of charged particle beam exposure apparatus 10A to 10E, and balancing stage 21 is scanned so that barycenter G of scanning stage 19 and balancing stage 21 becomes a fixed point. The positions of reflecting mirrors 70L and 70R secured to stage 19 are measured and based on their values, the expansion/contraction ratio of stage 19 and the positions of samples 16A to 16E are calculated to obtain deviation of the positions from target positions. Stage 19 is modeled such that rigid areas 19A to 19E are loosely connected, and for each area, the positions of three points are measured to calculate deviation of the exposure target position due to rotation of each ridged area. These deviations are corrected by deflectors 18A to 18D.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: April 4, 2000
    Assignees: Fujitsu Limited, Advantest Corporation
    Inventors: Nobuyuki Yasutake, Yoshihisa Ooae, Kazushi Ishida, Hiroshi Yasuda, Akiyoshi Tsuda, Hitoshi Tanaka
  • Patent number: 5981118
    Abstract: With using one scanning stage 19 where a plurality of wafers 16A to 16E is mounted through wafer holders 20A to 20E and balancing stage 21 disposed below scanning stage 19, scanning stage 19 is scanned based on exposure data common to a plurality of charged particle beam exposure apparatus 10A to 10E, and balancing stage 21 is scanned so that barycenter G of scanning stage 19 and balancing stage 21 becomes a fixed point. The positions of reflecting mirrors 70L and 70R secured to stage 19 are measured and based on their values, the expansion/contraction ratio of stage 19 and the positions of samples 16A to 16E are calculated to obtain deviation of the positions from target positions. Stage 19 is modeled such that rigid areas 19A to 19E are loosely connected, and for each area, the positions of three points are measured to calculate deviation of the exposure target position due to rotation of each ridged area. These deviations are corrected by deflectors 18A to 18D.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: November 9, 1999
    Assignees: Fujitsu Ltd., Advantest Corp.
    Inventors: Nobuyuki Yasutake, Yoshihisa Ooae, Kazushi Ishida, Hiroshi Yasuda, Akiyoshi Tsuda, Hitoshi Tanaka
  • Patent number: 5917360
    Abstract: When a pair of emitter-coupled transistor switches 22A and 22B are switched over, the D flipflop 26A shifts the base potential of a transistor buffer circuit 24 to reduce a potential fluctuation at a constant current source 21, reducing a current oscillation caused by the transient response of the constant current source 21 in which feedback control is performed by a comparator 214. In another construction, a potential oscillation waveform of the connected emitter node is stored in a RAM and the waveform read out of the RAM is added to the base of the transistor buffer circuit to reduce the current oscillation.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: June 29, 1999
    Assignee: Fujitsu Limited
    Inventor: Nobuyuki Yasutake
  • Patent number: 5404018
    Abstract: A charged particle beam exposure apparatus employs a main deflector made of electromagnetic coils and a subdeflector made of electrostatic deflection electrodes. An exposure method used for this apparatus is capable of shortening a wait time of the main deflector. The main deflector deflects a charged particle beam in a direction X, while the subdeflector deflects the beam around the deflecting position of the main deflector to expose an object to the beam. An area to be exposed on the object is divided into thin subfields such that the width, in an X-axis direction of each subfield, is approximately 1/3 the length in a Y-axis direction of the same.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: April 4, 1995
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Yasuda, Yoshihisa Oae, Akio Yamada, Nobuyuki Yasutake, Hisayasu Nishino
  • Patent number: 5368613
    Abstract: An electron beam exposure apparatus comprises an electron beam source, a holder for supporting a semiconductor substrate, a beam patterning part for patterning the electron beam, a beam focusing system for focusing the patterned electron beam on the semiconductor substrate, and a beam deflector system for deflecting the focused electron beam. The beam deflector comprises at least first, second and third coil assemblies connected in series for producing first through third magnetic fields respectively such that the first through third magnetic fields extend generally perpendicularly to the beam path of the electron beam at respective vertical levels on the beam path.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: November 29, 1994
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Akio Yamada
  • Patent number: 5223719
    Abstract: A charged particle beam mask and apparatus and method of using the same employing a mask that includes a substrate and a plurality of substantially rectangular beam passing sections arranged in parallel and to have a trapezoidal shape. In addition, the masks having a matrix of irradiation areas formed thereon where each irradiation area has a matrix of block patterns, are aligned and selectively irradiated to form a desired pattern on an object.
    Type: Grant
    Filed: July 5, 1991
    Date of Patent: June 29, 1993
    Assignee: Fujitsu Limited
    Inventors: Yasushi Takahashi, Kiichi Sakamoto, Yoshihisa Oae, Hiroshi Yasuda, Nobuyuki Yasutake
  • Patent number: 5208560
    Abstract: A signal transmission circuit including a signal line through which the signal is transmitted from a signal source element to a signal receiving element, a grounding line arranged along the length of the signal line, and a high impedance element connected between the grounding line and the ground.
    Type: Grant
    Filed: August 19, 1992
    Date of Patent: May 4, 1993
    Assignee: Fujitsu Limited
    Inventor: Nobuyuki Yasutake
  • Patent number: 5134398
    Abstract: A D/A converter converting a digital signal having n bits (n is an integer) into an analog signal includes constant-current output circuits, provided for the n bits of the digital signal, for selectively generating n constant currents on the basis of the n bits of the digital signals. The n constant currents have mutually different current values with respect to the n bits of the digital signal. The constant-current output circuits have resistance elements respectively provided for the n bits of the digital signal. The resistance elements define the mutually different current values. The D/A converter also includes an output circuit for adding the n constant currents to each other and for outputting the analog signal based on an addition result, and a temperature-dependent voltage generating part for generating a temperature-dependent voltage which changes as a temperature around the D/A converter changes.
    Type: Grant
    Filed: March 19, 1991
    Date of Patent: July 28, 1992
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Hidefumi Yabara
  • Patent number: 4853870
    Abstract: In an electron beam exposure system controlled by a computer, the system includes: an electron optical device for generating electron beams and irradiating the beams to a sample on a stage through a plurality of electron lens, a main deflection coil, and sub deflection electrodes, to form predetermined circuit patterns on the sample.
    Type: Grant
    Filed: May 27, 1987
    Date of Patent: August 1, 1989
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Jun-ichi Kai, Hiroshi Yasuda, Kenichi Kawashima
  • Patent number: 4651033
    Abstract: A differential switching circuit includes a first current switching circuit having a first input terminal; a second current switching circuit having a second input terminal and a threshold different from that of the first circuit; and a constant current source commonly connected to the first and second circuits. Complementary input signals are applied to the first and second input terminals.
    Type: Grant
    Filed: January 27, 1984
    Date of Patent: March 17, 1987
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Toshitaka Tsuda
  • Patent number: 4607333
    Abstract: An electron beam exposure apparatus includes an electromagnetic-type deflector for deflecting an electron beam in accordance with an analog signal corresponding to a digital signal which specifies an exposure region of a sample and an electrostatic-type deflector for deflecting the electron beam to a desired position in the exposure region. A difference signal representing the difference between the analog signal and a reference analog signal corresponding to the digital signal is taken out for compensating the amount of deflection of the electron beam in the electrostatic-type deflector.
    Type: Grant
    Filed: December 28, 1983
    Date of Patent: August 19, 1986
    Assignee: Fujitsu Limited
    Inventors: Nobuyuki Yasutake, Hiroshi Yasuda