Patents by Inventor Nobuyuki Yoshida

Nobuyuki Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104768
    Abstract: An article detection device includes: an image acquiring unit acquiring a surroundings image; a first information image preparing unit preparing a first information image by converting information on a load/unloading target portion of the article to an easily recognizable state based on the surroundings image; a first calculation unit calculating at least one of a position and a posture of the load/unloading target portion; a second information image preparing unit preparing a second information image by converting information on a pitch angle detection portion of the article to an easily recognizable state; and a second calculation unit configured extracting at least two edge candidates for the article extending in a specific direction and included in the second information image based on a calculation result from the first calculation unit and calculating a three-dimensional direction vector indicating a pitch angle of the article from the edge candidates.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Applicants: National Institute of Advanced Industrial Science and Technology, KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Nobuyuki KITA, Takuro Kato, Daisuke Okabe, Eiichi Yoshida, Yukikazu Koide, Norihiko Kato, Naoya Yokomachi, Tatsuya Komuro
  • Publication number: 20220340945
    Abstract: The purpose of the present invention is to provide microorganisms which efficiently produce nicotinamide riboside, and microorganisms which can efficiently produce both nicotinamide mononucleotide and nicotinamide riboside. Nicotinamide mononucleotide and nicotinamide riboside can be produced by culturing lactic acid bacteria belonging to the genus Fructobacillus.
    Type: Application
    Filed: October 6, 2020
    Publication date: October 27, 2022
    Inventors: Nobuyuki Yoshida, Kouji Nishikawa, Hideaki Idogaki
  • Patent number: 10609823
    Abstract: A method for manufacturing a multilayer wiring board includes a step (1) and a step (2). The step (1) disposes a hole for through-hole, a squirt of metal foils, and a lower space. The squirt of the metal foils on both the sides of the insulating layer is formed at an opening of the hole for through-hole. The lower space is formed between the squirt of the metal foils and an inner wall of the hole for through-hole. The step (2) plugs up the hole for through-hole by forming an electrolytic filled plating layer at an inside of the hole for through-hole and on the metal foils on both the sides of the insulating layer. The plugging of the hole for through-hole in the step (2) is performed by once decreasing a current density of an electrolytic filled plating in a middle of the electrolytic filled plating and then increasing the current density again.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: March 31, 2020
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki Yoshida
  • Patent number: 10165691
    Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: December 25, 2018
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki Yoshida
  • Patent number: 10076044
    Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole from a metal foil for an upper layer wiring pattern to an inner layer wiring pattern by using a conformal method or a direct laser method, and (2) a step of forming a via hole by forming electrolytic filling plating layers in the hole for a via hole, wherein the formation of the electrolytic filling plating layers in the step (2) is carried out by repeating change in electric current density of temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating and then increasing it again, two or more times before the electrolytic filling plating layers block an opening of the hole for a via hole.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: September 11, 2018
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki Yoshida
  • Publication number: 20180084651
    Abstract: A method for manufacturing a multilayer wiring board includes a step (1) and a step (2). The step (1) disposes a hole for through-hole, a squirt of metal foils, and a lower space. The squirt of the metal foils on both the sides of the insulating layer is formed at an opening of the hole for through-hole. The lower space is formed between the squirt of the metal foils and an inner wall of the hole for through-hole. The step (2) plugs up the hole for through-hole by forming an electrolytic filled plating layer at an inside of the hole for through-hole and on the metal foils on both the sides of the insulating layer. The plugging of the hole for through-hole in the step (2) is performed by once decreasing a current density of an electrolytic filled plating in a middle of the electrolytic filled plating and then increasing the current density again.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 22, 2018
    Inventor: Nobuyuki YOSHIDA
  • Patent number: 9810180
    Abstract: The EGR cooling structure includes a cylinder block having cylinders, and a cylinder head into which exhaust gas exhausted from the cylinders is collected. An exhaust emission control device is provided for purifying the exhaust gas exhausted from the cylinder head, and an EGR pipe is provided through which EGR gas of a part of the purified exhaust gas is introduced into an intake system. An EGR cooler is provided in the EGR pipe and cools the EGR gas with the cooling liquid. An exhaust gas passage leading from the cylinders to the exhaust gas purification device is curved when seen from a side, and the EGR cooler is disposed in the space surrounded by the cylinder block, the cylinder head, and the exhaust gas purification device.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: November 7, 2017
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Nobuyuki Yoshida, Hiroshi Takemoto, Taichi Yoshikawa
  • Patent number: 9648759
    Abstract: The present invention is a multilayer wiring board and a method for manufacturing the same, the multilayer wiring board having a hole for interlayer connection penetrating a metal foil and an insulating layer; an overhang of the metal foil formed at an opening of the hole; lower space formed between the overhang and an inside wall of the hole; and interlayer connection in which the hole is filled with electrolytic filling plating layers, wherein the electrolytic filling plating layers are formed as at least two or more layers, the lower space is filled with any electrolytic filling plating layer except for an outermost layer of the two or more layers of electrolytic filling plating layers, and a diameter in the inside of the interlayer connection formed by any electrolytic filling plating layer except for an outermost layer is equal to or larger than a diameter of the opening.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: May 9, 2017
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki Yoshida
  • Patent number: 9516764
    Abstract: To provide a method for manufacturing a multilayer wiring substrate, in which an insulating layer and a metal foil provided thereon are integrally laminated on an inner layer material having a wiring formed thereon, in which a hole for via hole is formed in the metal foil and the insulating layer, and in which the hole for via hole is filled with an electrolytic filled plating layer after a base electroless plating layer is formed, the method being featured in that, after the base electroless plating layer is formed, first, an electrolysis filled plating layer is formed to the extent that the hole for via hole is not completely filled, and then, after the surface of the electrolytic filled plating layer is etched, the hole for via hole is completely filled by an electrolytic filled plating layer.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 6, 2016
    Assignee: HITACHI CHEMICAL COMPANY, LTD
    Inventor: Nobuyuki Yoshida
  • Publication number: 20160249463
    Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.
    Type: Application
    Filed: September 24, 2014
    Publication date: August 25, 2016
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventor: Nobuyuki YOSHIDA
  • Publication number: 20160242299
    Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole from a metal foil for an upper layer wiring pattern to an inner layer wiring pattern by using a conformal method or a direct laser method, and (2) a step of forming a via hole by forming electrolytic filling plating layers in the hole for a via hole, wherein the formation of the electrolytic filling plating layers in the step (2) is carried out by repeating change in electric current density of temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating and then increasing it again, two or more times before the electrolytic filling plating layers block an opening of the hole for a via hole.
    Type: Application
    Filed: September 24, 2014
    Publication date: August 18, 2016
    Inventor: Nobuyuki YOSHIDA
  • Publication number: 20160242278
    Abstract: The present invention is a multilayer wiring board and a method for manufacturing the same, the multilayer wiring board having a hole for interlayer connection penetrating a metal foil and an insulating layer; an overhang of the metal foil formed at an opening of the hole; lower space formed between the overhang and an inside wall of the hole; and interlayer connection in which the hole is filled with electrolytic filling plating layers, wherein the electrolytic filling plating layers are formed as at least two or more layers, the lower space is filled with any electrolytic filling plating layer except for an outermost layer of the two or more layers of electrolytic filling plating layers, and a diameter in the inside of the interlayer connection formed by any electrolytic filling plating layer except for an outermost layer is equal to or larger than a diameter of the opening.
    Type: Application
    Filed: September 24, 2014
    Publication date: August 18, 2016
    Inventor: Nobuyuki YOSHIDA
  • Publication number: 20160050769
    Abstract: To provide a method for manufacturing a multilayer wiring substrate, in which an insulating layer and a metal foil provided thereon are integrally laminated on an inner layer material having a wiring formed thereon, in which a hole for via hole is formed in the metal foil and the insulating layer, and in which the hole for via hole is filled with an electrolytic filled plating layer after a base electroless plating layer is formed, the method being featured in that, after the base electroless plating layer is formed, first, an electrolysis filled plating layer is formed to the extent that the hole for via hole is not completely filled, and then, after the surface of the electrolytic filled plating layer is etched, the hole for via hole is completely filled by an electrolytic filled plating layer.
    Type: Application
    Filed: March 25, 2014
    Publication date: February 18, 2016
    Inventor: Nobuyuki YOSHIDA
  • Publication number: 20140246336
    Abstract: A technique allowing improved determination accuracy in quantifying a substance to be determined by lessening influence by a current component different from an oxidation current is provided. The oxidation current results from oxidation of a reducing substance generated through reaction between an enzyme and the substance to be determined. Current components are contained in a response current resulting from application of a determination potential, referenced to a counter electrode, to a working electrode. Since a conditioning potential higher than a determination potential is applied as a pulse to the working electrode, influence by a current component different from an oxidation current can be lessened. Thus, the response current can be measured in a stable manner and determination accuracy in quantification of a substance to be determined which is contained in a specimen can be improved.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 4, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Hideaki OOE, Jun TAKAGI, Kenji YOKOYAMA, Atsunori HIRATSUKA, Nobuyuki YOSHIDA, Noriko SASAKI
  • Publication number: 20140246335
    Abstract: A technique and a sensor chip allowing determination of a hematocrit value of a blood sample in a short period of time with low cost are provided. A response current obtained by sweep of a voltage applied across a working electrode for determination and a counter electrode for determination included in a sensor chip is measured and a hematocrit value is derived based on followability of the response current to temporal change in swept applied voltage. Therefore, it is not necessary to stand by until oxidation reduction reaction of an oxidation reducing substance is stabilized for determining a hematocrit value as in a conventional method of determining a hematocrit value, and thus a hematocrit value of a blood sample can be determined in a short period of time. Since no oxidation reducing substance is necessary for determining a hematocrit value, a hematocrit value can be determined with low cost.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 4, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Hideaki OOE, Jun TAKAGI, Kenji YOKOYAMA, Atsunori HIRATSUKA, Nobuyuki YOSHIDA, Noriko SASAKI
  • Publication number: 20130206120
    Abstract: An EGR cooling structure is provided. The EGR cooling structure (1) comprising: a cylinder block (11) having cylinders (11a); a cylinder head (12) (exhaust gas manifold section) into which exhaust gas exhausted from the cylinders (11a) is collected; an exhaust emission control device (20) for purifying the exhaust gas exhausted from the cylinder head (12); an EGR pipe (50) through which EGR gas of a part of the purified exhaust gas is introduced into an intake system r intake system from second exhaust gas piping (32) downstream of the exhaust gas purification device (20); and an EGR cooler (60) provided in the EGR pipe (50) and cooling the EGR gas with the cooling liquid. An exhaust gas passage leading from the cylinders (11a) to the exhaust gas purification device (20) is curved when seen from a side, and the EGR cooler (60) is disposed in the space (5) surrounded by the cylinder block (11), the cylinder head (12), and the exhaust gas purification device (20).
    Type: Application
    Filed: October 12, 2011
    Publication date: August 15, 2013
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Nobuyuki Yoshida, Hiroshi Takemoto, Taichi Yoshikawa
  • Patent number: 7407783
    Abstract: The present invention provides a fructosylamine oxidase which is obtainable by culturing Fusarium proliferatum, and purifying two types of fructosylamine oxidase (FAO) with different substrate specificities from the culture, and which is useful in the measurement of amadori compounds.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: August 5, 2008
    Inventors: Nobuyuki Yoshida, Yoshiki Tani, Satoshi Yonehara
  • Patent number: 7233872
    Abstract: The error of a sensor in motion capture system is corrected. An acceleration sensor determines the direction of gravity (G1) in a still initial state. The direction G1 will never change always if a drift dose not occur. However, actually if an object to which an acceleration sensor is attached moves along a coordinate axis, the direction gradually changes due to a drift with time. According to the invention, after a given time has passed, the acceleration sensor is stopped to determine the direction of gravity. Referring to the data on this determination, the true direction of gravity to be judged is compared with the direction of gravity G1 influenced by the drift. The difference between them is assumed to be an error due to a drift, and the error is subtracted from the determined value to correct the error of the measurement value.
    Type: Grant
    Filed: February 16, 2004
    Date of Patent: June 19, 2007
    Assignee: Akebono Brake Industry Co., Ltd.
    Inventors: Ryosuke Shibasaki, Yusuke Konishi, Hiroshi Kanasugi, Nobuyuki Yoshida
  • Publication number: 20060172367
    Abstract: The present invention provides a fructosylamine oxidase which is obtainable by culturing Fusarium proliferatum, and purifying two types of fructosylamine oxidase (FAO) with different substrate specificities from the culture, and which is useful in the measurement of amadori compounds.
    Type: Application
    Filed: September 16, 2003
    Publication date: August 3, 2006
    Applicant: Arkray, Inc.
    Inventors: Nobuyuki Yoshida, Yoshiki Tani, Satoshi Yonehara
  • Publication number: 20060161363
    Abstract: The error of a sensor in motion capture system is corrected. An acceleration sensor determines the direction of gravity (G1) in a still initial state. The direction G1 will never change always if a drift dose not occur. However, actually if an object to which an acceleration sensor is attached moves along a coordinate axis, the direction gradually changes due to a drift with time. According to the invention, after a given time has passed, the acceleration sensor is stopped to determine the direction of gravity. Referring to the data on this determination, the true direction of gravity to be judged is compared with the direction of gravity G1 influenced by the drift. The difference between them is assumed to be an error due to a drift, and the error is subtracted from the determined value to correct the error of the measurement value.
    Type: Application
    Filed: February 16, 2004
    Publication date: July 20, 2006
    Inventors: Ryosuke Shibasaki, Yusuke Konishi, Hiroshi Kanasugi, Nobuyuki Yoshida