Patents by Inventor Nobuyuki Yoshitake

Nobuyuki Yoshitake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 7781861
    Abstract: By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: August 24, 2010
    Assignee: Sony Corporation
    Inventors: Hideki Mori, Hirokazu Ejiri, Kenji Azami, Terukazu Ohno, Nobuyuki Yoshitake
  • Semiconductor device
    Publication number: 20060263986
    Abstract: By stably separating a melting location of a fuse (3) from conductive layers (5A, 5B), reliable melting of the fuse (3) is enabled. A fuse (3) including a fuse body (3A) and two pads (3Ba, 3Bb) connected by this and two conductive layers (5A, 5B) individually connected to the two pads (3Ba, 3Bb) are formed in a multilayer structure on a semiconductor substrate (1). A length of the fuse body (3A) is defined so that the melting location of the fuse (3) becomes positioned in the fuse body (3A) away from the region overlapped on the conductive layer (5A or 5B) when an electrical stress is applied between two conductive layers (5A, 5B) and the fuse (3) is melted.
    Type: Application
    Filed: March 30, 2004
    Publication date: November 23, 2006
    Applicant: Sony Corporation
    Inventors: Hideki Mori, Hirokazu Ejiri, Kenji Azami, Terukazu Ohno, Nobuyuki Yoshitake
  • Semiconductor device and method for producing the same
    Patent number: 6281565
    Abstract: A semiconductor device comprising an isolating layer (diffusion layer) having a deep depth which can be produced with improved productivity and a method of the same. The semiconductor device comprises a semiconductor substrate of a first conductivity type; a first diffusion layer of a second conductivity type formed in the semiconductor substrate; a first semiconductor layer formed on the semiconductor substrate; a second diffusion layer of the second conductivity type formed in the first semiconductor layer and connected to the first diffusion layer; and a second semiconductor layer formed on the first semiconductor layer; the second semiconductor layer being electrically isolated from the semiconductor substrate by the first diffusion layer and the second diffusion layer.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: August 28, 2001
    Assignee: Sony Corporation
    Inventor: Nobuyuki Yoshitake
  • Semiconductor device to absorb stray carriers
    Patent number: 5567974
    Abstract: A photo IC having a plurality of photodiodes is disclosed. A semiconductor region to absorb stray carriers is provided between the photodiodes. Stray carriers generated by incidence of light are absorbed by the semiconductor region. As a result, crosstalk between the photodiodes is reduced.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: October 22, 1996
    Assignee: Sony Corporation
    Inventors: Nobuyuki Yoshitake, Shinji Takakura