Patents by Inventor Noha Kafafi

Noha Kafafi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8032353
    Abstract: A method and apparatus for utilizing a bridged peripheral system within a bridged computer system having a host computer and a remote computer. The host computer executes peripheral driver software that initiates at least one communication. The host computer also executes a peripheral emulation that represents a peripheral of the remote client computer, where the at least one communication is processed by the peripheral emulation. In one embodiment, the peripheral is an audio codec.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 4, 2011
    Assignee: Teradici Corporation
    Inventors: Charles Peter Baron, Noha Kafafi, Kevin Mlazgar, Bradley Reginald Quinton
  • Patent number: 7257803
    Abstract: Integrated circuit devices having fixed and programmable logic portions are made by combining a hardware description language representation of the fixed logic and a hardware description language representation of the programmable logic to create a single hardware description language representation of a device. This allows multiple portions of programmable logic, distributed where needed in whatever size needed, to be interspersed among the fixed logic. Because the behavior of the programmable logic, rather than of the user programming, is being represented, a programmable logic architecture is provided that lacks behaviors, such as combinational loops, that would cause compilation of the hardware description language to generate errors.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: August 14, 2007
    Assignee: Altera Corporation
    Inventors: Steven J E Wilton, Kimberly Bozman, Noha Kafafi, James Wu
  • Patent number: 6983442
    Abstract: Integrated circuit devices having fixed and programmable logic portions are made by combining a hardware description language representation of the fixed logic and a hardware description language representation of the programmable logic to create a single hardware description language representation of a device. This allows multiple portions of programmable logic, distributed where needed in whatever size needed, to be interspersed among the fixed logic. Because the behavior of the programmable logic, rather than of the user programming, is being represented, a programmable logic architecture is provided that lacks behaviors, such as combinational loops, that would cause compilation of the hardware description language to generate errors.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: January 3, 2006
    Assignee: Altera Corporation
    Inventors: Steven J. E. Wilton, Kimberly Bozman, Noha Kafafi, James Wu