Patents by Inventor Nolifumi Sato
Nolifumi Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20010028099Abstract: A patterned polysilicon film is formed over a silicon substrate with an interlayer insulating film therebetween. Then heavily doped regions as well as a lightly doped region are formed on the polysilicon film. The entire polysilicon film is covered with an SiO2 film. The polysilicon film is hydrogenated, while an SiNx film is formed over the entire SiO2 film, by LPCVD using a gas comprising nitrogen and hydrogen.Type: ApplicationFiled: March 30, 2001Publication date: October 11, 2001Applicant: NEC CORPORATIONInventor: Nolifumi Sato
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Patent number: 6160601Abstract: There is provided a liquid crystal display including (a) a first substrate, (b) a second substrate spaced away from and facing the first substrate, (c) a liquid crystal layer sandwiched between the first and second substrates, (d) a first electrode formed on the first substrate at a surface facing the liquid crystal layer, (e) a second electrode formed on the first substrate at a surface facing the liquid crystal layer, and cooperating with the first electrode to form a pixel, the first and second electrodes generating an electric field therebetween to thereby implement in-plane switching, and (f) an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capacitance per a unit area of a dielectric layer formed between at least a part of an upper surfaceType: GrantFiled: December 21, 1998Date of Patent: December 12, 2000Assignee: NEC CorporationInventor: Nolifumi Sato
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Patent number: 6144436Abstract: There is provided a liquid crystal display including (a) a first substrate, (b) a second substrate spaced away from and facing the first substrate, (c) a liquid crystal layer sandwiched between the first and second substrates, (d) a first electrode formed on the first substrate at a surface facing the liquid crystal layer, (e) a second electrode formed on the first substrate at a surface facing the liquid crystal layer, and cooperating with the first electrode to form a pixel, the first and second electrodes generating an electric field therebetween to thereby implement in-plane switching, and (f) an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capacitance per a unit area of a dielectric layer formed between at least a part of an upper surfaceType: GrantFiled: December 22, 1999Date of Patent: November 7, 2000Assignee: NEC CorporationInventor: Nolifumi Sato
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Patent number: 6128062Abstract: There is provided a liquid crystal display including (a) a first substrate, (b) a second substrate spaced away from and facing the first substrate, (c) a liquid crystal layer sandwiched between the first and second substrates, (d) a first electrode formed on the first substrate at a surface facing the liquid crystal layer, (e) a second electrode formed on the first substrate at a surface facing the liquid crystal layer, and cooperating with the first electrode to form a pixel, the first and second electrodes generating an electric field therebetween to thereby implement in-plane switching, and (f) an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capacitance per a unit area of a dielectric layer formed between at least a part of an upper surfaceType: GrantFiled: September 13, 1999Date of Patent: October 3, 2000Assignee: NEC CorporationInventor: Nolifumi Sato
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Patent number: 6115096Abstract: There is provided a liquid crystal display including (a) a first substrate with at least one recessed portion, (b) a second substrate spaced away from and facing the first substrate, (c) a liquid crystal layer sandwiched between the first and second substrates, (d) a first electrode formed on the first substrate at an upper surface facing the liquid crystal layer, (e) a second electrode, at least part of which is, formed on the recessed portion of the first substrate at a surface facing the liquid crystal layer, and cooperating with the first electrode to form a pixel, the first and second electrodes generating an electric field therebetween to thereby implement in-plane switching, and (f) an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capaciType: GrantFiled: September 13, 1999Date of Patent: September 5, 2000Assignee: NEC CorporationInventor: Nolifumi Sato
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Patent number: 6072554Abstract: There is provided a liquid crystal display including (a) a first substrate, (b) a second substrate spaced away from and facing the first substrate, (c) a liquid crystal layer sandwiched between the first and second substrates, (d) a first electrode formed on the first substrate at a surface facing the liquid crystal layer, (e) a second electrode formed on the first substrate at a surface facing the liquid crystal layer, and cooperating with the first electrode to form a pixel, the first and second electrodes generating an electric field therebetween to thereby implement in-plane switching, and (f) an interlayer insulating film formed at least below the second electrode, but not formed at least below the first electrode, a dielectric layer formed between at least a part of an upper surface of the first electrode and the liquid crystal layer being designed to have a capacitance per a unit area, almost equal to a capacitance per a unit area of a dielectric layer formed between at least a part of an upper surfaceType: GrantFiled: September 13, 1999Date of Patent: June 6, 2000Assignee: NEC CorporationInventor: Nolifumi Sato
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Patent number: 5770495Abstract: The invention provides a method of fabricating a semiconductor device, including the steps of (a) forming an impurity region at a surface of a silicon substrate, (b) depositing an insulative film over the silicon substrate, (c) forming a contact hole through the insulative film to expose the impurity region of the silicon substrate, (d) forming an electrode wiring over the contact hole, the electrode wiring comprising a refractory metal silicide film and a silicon film overlying on the metal silicide film, the metal silicide film overlying the exposed impurity region, (e) depositing a second insulative film over a resultant, (f) depositing a polysilicon film on the second insulative film, (g) patterning the polysilicon film to form an element, and (h) heat-treating a resultant at high temperature in oxidizing atmosphere. The step (h) is to be carried out at any time after the step (f) has been completed.Type: GrantFiled: October 26, 1995Date of Patent: June 23, 1998Assignee: NEC CorporationInventors: Nolifumi Sato, Shinji Ohara, Hitoshi Mitani, Hidetaka Natsume, Takami Hiruma
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Patent number: 5761113Abstract: In an SRAM cell including two cross-coupled inverters each having a first resistance element and a drive MOS transistor, a second resistance element is connected between the first and the drive MOS transistor. A gate electrode of the drive MOS transistor of one of the inverters is connected between the first and second resistance elements of the other.Type: GrantFiled: October 30, 1995Date of Patent: June 2, 1998Assignee: NEC CorporationInventors: Hidetaka Natsume, Nolifumi Sato, Hitoshi Mitani, Takami Hiruma
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Patent number: 5388067Abstract: A flip-flop is composed of inverters including first and second MISFETs each comprising a TFT or an SOI transistor. A third MISFET, which comprises a TFT or an SOI transistor, has a gate connected to a write selecting signal line, and is connected between the output terminal of one of the inverters and a write/read signal line. A fourth MISFET has a gate connected to the gate of the other inverter. A fifth MISFET has a drain and a source connected to the write/read signal line and the drain of the fourth MISFET, and a gate connected to a read selecting signal line.Type: GrantFiled: April 1, 1994Date of Patent: February 7, 1995Assignee: NEC CorporationInventors: Nolifumi Sato, Manabu Ando