Patents by Inventor Noor E.V. Mohamed

Noor E.V. Mohamed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923271
    Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Noor E. V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu
  • Publication number: 20210351110
    Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Inventors: Noor E.V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu
  • Patent number: 11081426
    Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Noor E. V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu
  • Publication number: 20200043832
    Abstract: A three dimensional Integrated Circuit (IC) Power Grid (PG) may be provided. The three dimensional IC PG may comprise a first IC die, a second IC die, an interface, and a power distribution structure. The interface may be disposed between the first IC die and the second IC die. The power distribution structure may be connected to the interface. The power distribution structure may comprise at least one Through-Silicon Vias (TSV) and a ladder structure connected to at least one TSV.
    Type: Application
    Filed: July 19, 2019
    Publication date: February 6, 2020
    Inventors: Noor E.V. Mohamed, Fong-Yuan Chang, Po-Hsiang Huang, Chin-Chou Liu