Patents by Inventor Norbert Colombet

Norbert Colombet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11424156
    Abstract: A detachable structure comprises a carrier substrate and a silicon oxide layer positioned on the substrate at a first interface. The detachable structure is notable in that: the oxide layer has a thickness of less than 200 nm; light hydrogen and/or helium species are distributed deeply and over the entire area of the structure according to an implantation profile, a maximum concentration of which is located in the thickness of the oxide layer; the total dose of implanted light species, relative to the thickness of the oxide layer, exceeds, at least by a factor of five, the solubility limit of these light species in the oxide layer.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: August 23, 2022
    Assignee: Soitec
    Inventors: Didier Landru, Oleg Kononchuk, Nadia Ben Mohamed, Rénald Guerin, Norbert Colombet
  • Publication number: 20210050249
    Abstract: A detachable structure comprises a carrier substrate and a silicon oxide layer positioned on the substrate at a first interface. The detachable structure is notable in that: the oxide layer has a thickness of less than 200 nm; light hydrogen and/or helium species are distributed deeply and over the entire area of the structure according to an implantation profile, a maximum concentration of which is located in the thickness of the oxide layer; the total dose of implanted light species, relative to the thickness of the oxide layer, exceeds, at least by a factor of five, the solubility limit of these light species in the oxide layer.
    Type: Application
    Filed: January 14, 2019
    Publication date: February 18, 2021
    Inventors: Didier Landru, Oleg Kononchuk, Nadia Ben Mohamed, Rénald Guerin, Norbert Colombet
  • Patent number: 10297464
    Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1,100° C., for a period of time of at least 15 seconds.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 21, 2019
    Assignee: Soitec
    Inventors: Marcel Broekaart, Luciana Capello, Isabelle Bertrand, Norbert Colombet
  • Publication number: 20180182640
    Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1100° C., for a period of time of at least 15 seconds.
    Type: Application
    Filed: June 1, 2016
    Publication date: June 28, 2018
    Inventors: Marcel Broekaart, Luciana Capello, Isabelle Bertrand, Norbert Colombet
  • Patent number: 7304776
    Abstract: The invention concerns a integrated optical structure comprising a plurality of parts made at least of a dielectric material, stacked according to the levels of integration and defining at least an optical microguide, and further comprising at least an integrated part (15) made of an electrically conductive material, interposed or inserted between at least two of said dielectric parts and having at least one part (11a) externally accessible to said dielectric parts for at least an external electrical connection.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: December 4, 2007
    Assignee: Opsitech-Optical System on a Chip
    Inventor: Norbert Colombet
  • Publication number: 20040232521
    Abstract: The invention concerns a integrated optical structure comprising a plurality of parts made at least of a dielectric material, stacked according to the levels of integration and defining at least an optical microguide, and further comprising at least an integrated part (15) made of an electrically conductive material, interposed or inserted between at least two of said dielectric parts and having at least one part (11a) externally accessible to said dielectric parts for at least an external electrical connection.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 25, 2004
    Inventor: Norbert Colombet
  • Publication number: 20030038338
    Abstract: A semiconductor device includes multiple layers of integrated electronic components, and at least one electrical connection strip defining a fusible strip in one of the layers. An end of the fusible strip is connected to an integrated electronic component. An intermediate electrical connection and heat dissipation structure and a screen are disposed between the fusible strip and the integrated electronic component.
    Type: Application
    Filed: June 25, 2002
    Publication date: February 27, 2003
    Applicant: STMicroelectronics S.A.
    Inventors: Richard Fournel, Norbert Colombet, Phillippe Candelier