Abstract: A parallel databus assembly and method includes modules connected to parallel signal lines, each of the modules having a databus driver being in immediate connection with the signal lines and a controller connected to the databus driver. At least some of the parallel signal lines are data lines for transmitting data or control lines for controlling the data transmission of the data via the data lines. A clock generator for generating a bus frequency with which the signals transmitted in the signal lines are clocked is connected to the databus drivers. The databus drivers are fashioned such that the signals to be transmitted from and to the data lines and the control lines are accepted during a clock pulse prescribed by the clock generator and are emitted during a following clock pulse.