Patents by Inventor Norbert Labrenz

Norbert Labrenz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12707979
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an isolation region that is formed at a main surface of the substrate, and a recess in the isolation region. The semiconductor device further includes an active or passive device that is formed in the recess. The active or passive device includes a first semiconductor material region and a second semiconductor material region. The first semiconductor material region adjoins at least part of the second semiconductor material region in a first direction parallel to the main surface of the substrate. An upper surface of the first semiconductor material region is above an upper surface of the second semiconductor material region. The upper surface of the second semiconductor material region is below the main surface of the substrate.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: August 11, 2026
    Assignee: Infineon Technologies Austria AG
    Inventors: Norbert Labrenz, Alim Karmous
  • Publication number: 20240421021
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and an active device region having gate trenches formed at a first main surface of the semiconductor substrate. The semiconductor device further includes a current sensor region having gate trenches formed at the first main surface of the semiconductor substrate. The semiconductor device further includes a transition region arranged between the active device region and the current sensor region. The transition region includes a supplementary trench formed at the first main surface of the semiconductor substrate. The supplementary trench separates the gate trenches of the active device region from the gate trenches of the current sensor region. An electrode formed in the supplementary trench is neither electrically connected to gate electrodes formed in the gate trenches of the active device region nor electrically connected to gate electrodes formed in the gate trenches of the current sensor region.
    Type: Application
    Filed: May 29, 2024
    Publication date: December 19, 2024
    Inventors: Alim Karmous, Norbert Labrenz
  • Publication number: 20240047379
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an isolation region that is formed at a main surface of the substrate, and a recess in the isolation region. The semiconductor device further includes an active or passive device that is formed in the recess. The active or passive device includes a first semiconductor material region and a second semiconductor material region. The first semiconductor material region adjoins at least part of the second semiconductor material region in a first direction parallel to the main surface of the substrate. An upper surface of the first semiconductor material region is above an upper surface of the second semiconductor material region. The upper surface of the second semiconductor material region is below the main surface of the substrate.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 8, 2024
    Inventors: Norbert Labrenz, Alim Karmous