Patents by Inventor Norbert Puetz

Norbert Puetz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10544313
    Abstract: A method of increasing photo-luminescent quantum yield (PLQY) of QDs to be used as down-converters placed directly on an LED chip includes synthesizing a plurality of quantum dots, applying energy to the plurality of quantum dots to increase PLQY of the plurality of quantum dots, dispensing the plurality of quantum dots onto the LED chip, and curing the LED chip.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: January 28, 2020
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Nathan Mclaughlin, Kari N. Haley, Morgan Vonnahme, Brian Theobald, Norbert Puetz
  • Patent number: 10106734
    Abstract: A quantum dot includes a nanocrystalline core and an alloyed nanocrystalline shell made of a semiconductor material composition different from the nanocrystalline core. The alloyed nanocrystalline shell is bonded to and completely surrounds the nanocrystalline core.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: October 23, 2018
    Assignee: OSRAM Opto Semiconductor GmbH
    Inventors: Yagnaseni Ghosh, Benjamin Daniel Mangum, Norbert Puetz, Juanita N. Kurtin
  • Publication number: 20180142143
    Abstract: A quantum dot includes a nanocrystalline core and an alloyed nanocrystalline shell made of a semiconductor material composition different from the nanocrystalline core. The alloyed nanocrystalline shell is bonded to and completely surrounds the nanocrystalline core.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 24, 2018
    Inventors: Yagnaseni Ghosh, Benjamin Daniel Mangum, Norbert Puetz, Juanita N. Kurtin
  • Patent number: 9831397
    Abstract: Fabricating a semiconductor structure including forming a nanocrystalline core from a first semiconductor material, forming a nanocrystalline shell from a second, different, semiconductor material that at least partially surrounds the nanocrystalline core, wherein the nanocrystalline core and the nanocrystalline shell form a quantum dot. Fabrication further involves forming an insulator layer encapsulating the quantum dot to create a coated quantum dot, and forming an additional insulator layer on the coated quantum dot using an Atomic Layer Deposition (ALD) process.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: November 28, 2017
    Assignee: Pacific Light Technologies Corp.
    Inventors: Brian Theobald, Matthew Bertram, Weiwen Zhao, Juanita N. Kurtin, Norbert Puetz
  • Patent number: 9732274
    Abstract: A semiconductor structure includes a nanocrystalline core comprising a first semiconductor material having a first bandgap, and a nanocrystalline shell comprising a second semiconductor material different than the first semiconductor material at least partially surrounding the nanocrystalline core, the second semiconductor material having a second bandgap greater than the first bandgap.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 15, 2017
    Assignee: Pacific Light Technologies Corp.
    Inventors: Benjamin Daniel Mangum, Nathan Evan Stott, Norbert Puetz, Juanita N. Kurtin
  • Publication number: 20170229619
    Abstract: A method of increasing photo-luminescent quantum yield (PLQY) of QDs to be used as down-converters placed directly on an LED chip includes synthesizing a plurality of quantum dots, applying energy to the plurality of quantum dots to increase PLQY of the plurality of quantum dots, dispensing the plurality of quantum dots onto the LED chip, and curing the LED chip.
    Type: Application
    Filed: February 6, 2017
    Publication date: August 10, 2017
    Inventors: Nathan Mclaughlin, Kari N. Haley, Morgan Vonnahme, Brian Theobald, Norbert Puetz
  • Publication number: 20170005226
    Abstract: A semiconductor structure includes a nanocrystalline core comprising a first semiconductor material having a first bandgap, and a nanocrystalline shell comprising a second semiconductor material different than the first semiconductor material at least partially surrounding the nanocrystalline core, the second semiconductor material having a second bandgap greater than the first bandgap.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 5, 2017
    Inventors: Benjamin Daniel Mangum, Nathan Evan Stott, Norbert Puetz, Juanita N. Kurtin
  • Publication number: 20160333268
    Abstract: Irregular large volume semiconductor coatings for quantum dots (QDs) and the resulting quantum dot materials are described. In an example, a semiconductor structure includes a quantum dot structure having an outermost surface. A crystalline semiconductor coating is disposed on and completely surrounds the outermost surface of the quantum dot structure. The crystalline semiconductor coating has an irregular outermost geometry.
    Type: Application
    Filed: January 16, 2015
    Publication date: November 17, 2016
    Inventors: Matthew J. Carillo, Matthew Bertram, Norbert Puetz, Juanita N. Kurtin
  • Publication number: 20160268483
    Abstract: Fabricating a semiconductor structure including forming a nanocrystalline core from a first semiconductor material, forming a nanocrystalline shell from a second, different, semiconductor material that at least partially surrounds the nanocrystalline core, wherein the nanocrystalline core and the nanocrystalline shell form a quantum dot. Fabrication further involves forming an insulator layer encapsulating the quantum dot to create a coated quantum dot, and forming an additional insulator layer on the coated quantum dot using an Atomic Layer Deposition (ALD) process.
    Type: Application
    Filed: March 8, 2016
    Publication date: September 15, 2016
    Inventors: Brian Theobald, Matthew Bertram, Weiwen Zhao, Juanita N. Kurtin, Norbert Puetz
  • Publication number: 20160230088
    Abstract: Alloyed nanocrystals and quantum dots having alloyed nanocrystals are described. In an example, a quantum dot includes an alloyed Group II-VI nanocrystalline core. The quantum dot also includes a Group II-VI nanocrystalline shell having a semiconductor material composition different from the alloyed Group II-VI nanocrystalline core. The Group II-VI nanocrystalline shell is bonded to and completely surrounds the alloyed Group II-VI nanocrystalline core.
    Type: Application
    Filed: July 15, 2014
    Publication date: August 11, 2016
    Inventors: Norbert Puetz, Nathan Evan Stott, Matthew Bertram, Juanita N. Kurtin
  • Publication number: 20160032183
    Abstract: A quantum dot includes a nanocrystalline core and an alloyed nanocrystalline shell made of a semiconductor material composition different from the nanocrystalline core. The alloyed nanocrystalline shell is bonded to and completely surrounds the nanocrystalline core.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 4, 2016
    Inventors: Yagnaseni Ghosh, Benjamin Daniel Mangum, Norbert Puetz, Juanita N. Kurtin
  • Publication number: 20150028876
    Abstract: An apparatus to measure and collect data relating to properties of light for a plurality of light-producing devices comprises a rail having a longitudinal axis along which the plurality of light-producing devices is aligned. A measurement tool is mounted on the rail and moved under motor control to measure the data for each of the plurality of light-producing devices.
    Type: Application
    Filed: July 24, 2014
    Publication date: January 29, 2015
    Inventors: Nathan McLaughlin, Benjamin Smith, Norbert Puetz
  • Patent number: 8362460
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: January 29, 2013
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20120125418
    Abstract: A multi junction solar cell having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The solar cell includes an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the solar cell and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: January 31, 2012
    Publication date: May 24, 2012
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL
  • Patent number: 8124958
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 28, 2012
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20110186105
    Abstract: A solar cell assembly with a carrier having formed thereon solder lugs. The solder lugs have a base portion that electrically connects to an electrical contact of a solar cell. The soldering lug defines a wire-receiving opening in which a heavy gauge electrical wire can be soldered or secured with electrically conductive epoxy.
    Type: Application
    Filed: February 11, 2011
    Publication date: August 4, 2011
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Louis B. ALLARD
  • Publication number: 20110073913
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: December 3, 2010
    Publication date: March 31, 2011
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL
  • Patent number: 7872252
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: January 18, 2011
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20080035939
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 14, 2008
    Applicant: CYRIUM TECHNOLOGIES INCORPORATED
    Inventors: Norbert PUETZ, Simon FAFARD, Bruno J. RIEL