Patents by Inventor Noriaki Fukiage

Noriaki Fukiage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110001197
    Abstract: A sidewall spacer film or the like is removed without damaging a device structure section. Specifically disclosed is a method for manufacturing a semiconductor device, which comprises a step of forming a first thin film composed of GeCOH or GeCH on a substrate (21) to be processed, a step of removing a part of the first thin film and obtaining a remaining portion (30), and a processing step of performing a certain process on the substrate (21) through the space formed by removing the first thin film.
    Type: Application
    Filed: October 10, 2007
    Publication date: January 6, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Noriaki Fukiage, Yoshihiro Kato, Tsunetoshi Arikado
  • Patent number: 7862683
    Abstract: An apparatus and method for improving the chamber dry cleaning of a PECVD system. The apparatus includes an annular gas ring with multiple outlets for introducing a cleaning gas into the process chamber, and the method includes using the gas ring to introduce a cleaning species from a remote plasma source into the processing chamber.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: January 4, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Publication number: 20100175713
    Abstract: A method of cleaning a plasma processing apparatus for processing a target in a process container, which is vacuum-evacuatable, using plasma, includes performing a first cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a first pressure, and performing a second cleaning process by supplying a cleaning gas into the process container to generate plasma and maintaining the pressure in the process container at a second pressure that is higher than the first pressure. Accordingly, the plasma processing apparatus can be efficiently and rapidly cleaned without damaging at least one of the group consisting of inner surfaces of the process container and members in the process container.
    Type: Application
    Filed: February 18, 2008
    Publication date: July 15, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Noriaki Fukiage, Shinji Komoto, Hiroyuki Takaba, Kiyotaka Ishibashi
  • Publication number: 20100173467
    Abstract: A thin film is used in a semiconductor device manufacturing process. The thin film contains silicon, germanium, and oxygen.
    Type: Application
    Filed: May 19, 2008
    Publication date: July 8, 2010
    Applicant: Tokyo Electron Limited
    Inventors: Yoshihiro Kato, Noriaki Fukiage
  • Patent number: 7718497
    Abstract: A semiconductor device manufacturing method includes: forming a sidewall spacer on a sidewall surface of a gate electrode; forming a pair of second conductive type source and drain regions in an active region; covering top surfaces of a semiconductor layer, a device isolation region, the sidewall spacer and the gate electrode with a metal film; reducing resistance of the source and drain regions and the gate electrode partially by making the metal film react with the semiconductor layer and the gate electrode; and removing an unreacted portion of the metal film and the sidewall spacer simultaneously by using an etchant which readily etches the unreacted portion of the metal film and the sidewall spacer while hardly etching the device isolation region, resistance-reduced portions of the gate electrode and resistance-reduced portions of the source and drain regions.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: May 18, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Yasushi Akasaka, Noriaki Fukiage, Yoshihiro Kato, Kazuhide Hasebe, Pao-Hwa Chou
  • Publication number: 20100086681
    Abstract: Provided is a control device of an evaporating apparatus performing a film forming process on a substrate with a film forming material evaporated from a vapor deposition source, and a storage of the control device stores a plurality of tables each showing a relationship between a deposition rate and a flow rate of a carrier gas. A table selection unit selects a desired table from the plurality of tables stored in the storage based on a processing condition. A deposition controller calculates a deposition rate based on a signal outputted from a QCM. A carrier gas controller controls the flow rate of the carrier gas to obtain a desired deposition rate based on a difference between a target deposition rate and the deposition rate obtained by the deposition controller, with reference to data indicating the relationship between the deposition rate and the flow rate of the carrier gas.
    Type: Application
    Filed: February 27, 2008
    Publication date: April 8, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroyuki Ikuta, Noriaki Fukiage
  • Publication number: 20090304906
    Abstract: An evaporating apparatus 10 includes a vapor deposition source 210, a transport path 110e21, a blowing vessel 110 and a first processing chamber 100. The transport path 110e21 is connected with the vapor deposition source 210 via a connection path 220e and transports a film forming material vaporized from the vapor deposition source 210. A blowing port 110e11 is formed of a metal porous member and blows out the film forming material which has passed through a buffer space S via the transport path 110e21. The first processing chamber 100 performs the film formation on a target object G with the blown-out film forming material. A gap between the target object G and the blowing port 110e1 can be shortened by blowing out gas molecules having a high uniformity from the metal porous member.
    Type: Application
    Filed: October 1, 2007
    Publication date: December 10, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kenji Suduo, Hiroyuki Ikuta, Noriaki Fukiage
  • Patent number: 7611758
    Abstract: A method and apparatus for improving the post-development photoresist profile on a deposited dielectric film. The method includes depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process and post processing the TERA film using a plasma process. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple precursors and process gasses.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: November 3, 2009
    Assignees: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Noriaki Fukiage, Katherina Babich
  • Publication number: 20080299728
    Abstract: A semiconductor device manufacturing method includes: forming a sidewall spacer on a sidewall surface of a gate electrode; forming a pair of second conductive type source and drain regions in an active region; covering top surfaces of a semiconductor layer, a device isolation region, the sidewall spacer and the gate electrode with a metal film; reducing resistance of the source and drain regions and the gate electrode partially by making the metal film react with the semiconductor layer and the gate electrode; and removing an unreacted portion of the metal film and the sidewall spacer simultaneously by using an etchant which readily etches the unreacted portion of the metal film and the sidewall spacer while hardly etching the device isolation region, resistance-reduced portions of the gate electrode and resistance-reduced portions of the source and drain regions.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yasushi Akasaka, Noriaki Fukiage, Yoshihiro Kato, Kazuhide Hasebe, Pao-Hwa Chou
  • Patent number: 7371436
    Abstract: A method and system for depositing a film with tunable optical and etch resistant properties on a substrate by plasma-enhanced chemical vapor deposition. A chamber has a plasma source and a substrate holder coupled to a RF source. A substrate is placed on the substrate holder. The TERA layer is deposited on the substrate. The amount of RF power provided by the RF source is selected such that the rate of deposition of at least one portion of the TERA layer is greater than when no RF power is applied the substrate holder.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: May 13, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Publication number: 20080000423
    Abstract: A method and apparatus are included that provide an improved deposition process for a Tunable Etch Resistant ARC (TERA) layer with improved wafer to wafer uniformity and reduced particle contamination. More specifically, the processing chamber is seasoned to reduce the number of contaminant particles generated in the chamber during the deposition of the TERA layer and improve wafer to wafer uniformity. The apparatus includes a chamber having an upper electrode at least one RF source, a substrate holder, and a showerhead for providing multiple precursors and process gasses.
    Type: Application
    Filed: August 8, 2007
    Publication date: January 3, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Noriaki Fukiage
  • Publication number: 20070128876
    Abstract: An apparatus and method for improving the chamber dry cleaning of a PECVD system. The apparatus includes an annular gas ring with multiple outlets for introducing a cleaning gas into the process chamber, and the method includes using the gas ring to introduce a cleaning species from a remote plasma source into the processing chamber.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 7, 2007
    Inventor: Noriaki Fukiage
  • Patent number: 7201174
    Abstract: In a chamber (11), a SiOF film is formed on a wafer W using a plasma CVD method. A film remaining inside the chamber (11) is cleaned up using a gas containing NF3. A manometer (28) is prepared for the chamber (11). An end point of cleaning of the chamber (11) is detected by monitoring the pressure inside the chamber (11).
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: April 10, 2007
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Publication number: 20060046506
    Abstract: A method and apparatus for improving the properties of a deposited film. The method includes depositing a low-k dielectric on a substrate using a plasma-enhanced chemical vapor deposition process and performing a soft de-chucking sequence after depositing the low-k dielectric film using a soft plasma process. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple precursors and process gasses.
    Type: Application
    Filed: September 1, 2004
    Publication date: March 2, 2006
    Applicant: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Publication number: 20050221020
    Abstract: A method and apparatus are included that provide an improved deposition process for a Tunable Etch Resistant ARC (TERA) layer with improved wafer to wafer uniformity and reduced particle contamination. More specifically, the processing chamber is seasoned to reduce the number of contaminant particles generated in the chamber during the deposition of the TERA layer and improve wafer to wafer uniformity. The apparatus includes a chamber having an upper electrode at least one RF source, a substrate holder, and a showerhead for providing multiple precursors and process gasses.
    Type: Application
    Filed: March 30, 2004
    Publication date: October 6, 2005
    Applicant: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Publication number: 20050100683
    Abstract: A method and apparatus for improving the post-development photoresist profile on a deposited dielectric film. The method includes depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process and post processing the TERA film using a plasma process. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple precursors and process gasses.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 12, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Noriaki Fukiage, Katherina Babich
  • Publication number: 20050100682
    Abstract: A method and apparatus for depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process, wherein for at least a part of the deposition of the TERA film, the plasma-enhanced chemical vapor deposition process employs a precursor that reduces reaction with a photoresist. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple process and precursor gasses.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 12, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Noriaki Fukiage, Katherina Babich
  • Publication number: 20050039681
    Abstract: A method and system for depositing a film with tunable optical and etch resistant properties on a substrate by plasma-enhanced chemical vapor deposition. A chamber has a plasma source and a substrate holder coupled to a RF source. A substrate is placed on the substrate holder. The TERA layer is deposited on the substrate. The amount of RF power provided by the RF source is selected such that the rate of deposition of at least one portion of the TERA layer is greater than when no RF power is applied the substrate holder.
    Type: Application
    Filed: August 21, 2003
    Publication date: February 24, 2005
    Applicant: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Patent number: 6773762
    Abstract: In a case where a CF film is used as an interlayer dielectric film of a semiconductor device, when a wiring of tungsten is formed, the CF film is heated to a temperature of, e.g., about 400 to 450° C. At this time, F gases are desorbed from the CF film, so that there are various disadvantages due to the corrosion of the wiring and the decrease of film thickness. In order to prevent this, thermostability is enhanced. A compound gas of C and F, e.g., C4F8 gas, and a hydrocarbon gas, e.g., C2H4 gas, are used as thin film deposition gases. These gases are activated as plasma to deposit a CF film on a semiconductor wafer 10 using active species thereof. Then, Ar gas serving as a sputtering gas is introduced to be activated as plasma, and the CF film deposited on the wafer 10 is sputtered with the Ar plasma. If the thin-film deposition process and the sputtering process are alternately repeated, weak bonds existing in the CF film are removed by sputtering.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: August 10, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Fukiage
  • Patent number: 6753610
    Abstract: The object of the present invention is to provide a diffusion preventing film capable of inhibiting diffusion of Cu into an insulator film when Cu is used as a wiring material. This objective is attained by forming the diffusion preventing film from a crystalline WCN film. The WCN film, when subjected to X-ray diffraction, shows peaks at a first position between 36° to 38° and at a second position between 42° to 44°. The half-width of the peak at the first position is 3.2° or less, and the half-width of the peak at the second position is 2.6° or less. Since the WCN film has satisfactory coverage, it can form a thick barrier film in a concave with a high aspect ratio.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: June 22, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Fukiage