Patents by Inventor Noriaki Hatanaka

Noriaki Hatanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200353581
    Abstract: An industrial machine is an industrial machine which has a history recording function, and includes: a manual pulse generator which includes a handle for manually operating the position of a drive axis in the industrial machine by an operator; a drive axis control unit which controls the drive axis according to the operation of the handle; a handle operation determination unit which determines the operation of the handle; and an operation history recording unit which records, as an operation history, the operation of the handle determined with the handle operation determination unit, and when the number of rotations of the handle exceeds a threshold value, the handle operation determination unit determines the operation of the handle, and the operation history recording unit records, as the operation history, the operation of the handle.
    Type: Application
    Filed: April 17, 2020
    Publication date: November 12, 2020
    Applicant: FANUC CORPORATION
    Inventor: Noriaki HATANAKA
  • Patent number: 10809672
    Abstract: A measurement system includes a control device which controls a control target device in real time and transmits control data to a terminal device, and a measuring instrument which acquires data indicating a physical status of the control target device and transmits the data as measurement data to the terminal device. The control device includes a control unit and a sequence control unit, and the control unit transmits a timing signal to the measuring instrument. The control device transmits the control data that includes a piece of time information based on the timing signal to the terminal device. The measuring instrument transmits the measurement data that includes a piece of time information based on the timing signal to the terminal device. The terminal device compensates for a delay between the control data and the measurement data on the basis of the pieces of time information.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 20, 2020
    Assignee: FANUC CORPORATION
    Inventor: Noriaki Hatanaka
  • Patent number: 10394214
    Abstract: A numerical controller analyzes a program with a command program analysis unit, and determines a macro call or a sub program call with a macro call or sub program call determination unit. When a program stop determination unit determines that the program is to be stopped, the program stop determination unit commands a program stop requesting unit to output a program stop request to the command program analysis unit and an interpolation processing unit, thereby stopping the program.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: August 27, 2019
    Assignee: FANUC Corporation
    Inventor: Noriaki Hatanaka
  • Patent number: 10331104
    Abstract: A machine tool is provided with an operation evaluation section that outputs evaluation data on an operation of the machine tool and a machine learning device that performs machine learning of the movement amount of an axis. The machine learning device calculates a reward from physical-amount data on the machine tool and the evaluation data, performs adjustment of the movement amount of the axis based on a machine learning result of the adjustment of the movement amount of the axis and the physical-amount data, and performs the machine learning of the adjustment of the movement amount of the axis based on the adjusted movement amount of the axis, the physical-amount data after the operation of the machine tool based on the movement amount of the axis, and the reward.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: June 25, 2019
    Assignee: FANUC CORPORATION
    Inventor: Noriaki Hatanaka
  • Patent number: 10303143
    Abstract: A numerical controller of the invention includes a multi-core processor having a plurality of central processing unit (CPU) cores. Herein, importance is assigned in advance to each of a plurality of processes related to numerical control, and load distribution of the multi-core processor is performed by allocating the respective processes to the plurality of CPU cores based on the assigned importance.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: May 28, 2019
    Assignee: Fanuc Corporation
    Inventor: Noriaki Hatanaka
  • Publication number: 20180120789
    Abstract: A measurement system includes a control device which controls a control target device in real time and transmits control data to a terminal device, and a measuring instrument which acquires data indicating a physical status of the control target device and transmits the data as measurement data to the terminal device. The control device includes a control unit and a sequence control unit, and the control unit transmits a timing signal to the measuring instrument. The control device transmits the control data that includes a piece of time information based on the timing signal to the terminal device. The measuring instrument transmits the measurement data that includes a piece of time information based on the timing signal to the terminal device. The terminal device compensates for a delay between the control data and the measurement data on the basis of the pieces of time information.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 3, 2018
    Inventor: Noriaki HATANAKA
  • Publication number: 20170146967
    Abstract: A numerical controller of the invention includes a multi-core processor having a plurality of central processing unit (CPU) cores. Herein, importance is assigned in advance to each of a plurality of processes related to numerical control, and load distribution of the multi-core processor is performed by allocating the respective processes to the plurality of CPU cores based on the assigned importance.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 25, 2017
    Applicant: FANUC CORPORATION
    Inventor: Noriaki Hatanaka
  • Publication number: 20170031343
    Abstract: A machine tool is provided with an operation evaluation section that outputs evaluation data on an operation of the machine tool and a machine learning device that performs machine learning of the movement amount of an axis. The machine learning device calculates a reward from physical-amount data on the machine tool and the evaluation data, performs adjustment of the movement amount of the axis based on a machine learning result of the adjustment of the movement amount of the axis and the physical-amount data, and performs the machine learning of the adjustment of the movement amount of the axis based on the adjusted movement amount of the axis, the physical-amount data after the operation of the machine tool based on the movement amount of the axis, and the reward.
    Type: Application
    Filed: July 22, 2016
    Publication date: February 2, 2017
    Inventor: Noriaki HATANAKA
  • Publication number: 20150253758
    Abstract: A program axis command checking unit belonging to a directed program analyzing unit determines whether or not there is a command of a target axis of an erroneous axis command in a directed program and whether or not a directed value exceeds an allowable range, and an interpolation axis command checking unit belonging to an interpolation command generating unit determines whether or not there is a command of a target axis of an erroneous axis command and whether a directed value exceeds an allowable range, and performs alarm stop by making an alarm stop request in a case where the alarm stop is to be performed.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 10, 2015
    Inventor: Noriaki HATANAKA
  • Publication number: 20150105879
    Abstract: A numerical controller analyzes a program with a command program analysis unit, and determines a macro call or a sub program call with a macro call or sub program call determination unit. When a program stop determination unit determines that the program is to be stopped, the program stop determination unit commands a program stop requesting unit to output a program stop request to the command program analysis unit and an interpolation processing unit, thereby stopping the program.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 16, 2015
    Inventor: Noriaki HATANAKA
  • Patent number: 6473255
    Abstract: Sense current is applied in pulses, synchronized with the timing clock generated by a clock generator 5, to transducer 2 in the information storage device, reducing the time-averaged value of the sense current. The recorded information on the magnetic disk medium 1 is reproduced by the MR head as reproducing signal pulses in synchronism with the above timing clock. The amplitude of the reproducing signal pulses are proportional to the magnetic field of the magnetic disk medium 1. The reproducing signal pulses are sample-held by a sample-hold circuit 6, and after being digitized by an A/D converter 7, recorded data are retrieved through a demodulator circuit 8 of a partial-response system.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: October 29, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Noriaki Hatanaka, Tadahiko Kameyama, Takeshi Maeda
  • Publication number: 20010015867
    Abstract: Sense current is applied in pulses, synchronized with the timing clock generated by a clock generator 5, to transducer 2 in the information storage device, reducing the time-averaged value of the sense current. The recorded information on the magnetic disk medium 1 is reproduced by the MR head as reproducing signal pulses in synchronism with the above timing clock. The amplitude of the reproducing signal pulses are proportional to the magnetic field of the magnetic disk medium 1. The reproducing signal pulses are sample-held by a sample-hold circuit 6, and after being digitized by an A/D converter 7, recorded data are retrieved through a demodulator circuit 8 of a partial-response system.
    Type: Application
    Filed: February 18, 1998
    Publication date: August 23, 2001
    Inventors: NORIAKI HATANAKA, TADAHIKO KAMEYAMA, TAKESHI MAEDA
  • Patent number: 6218903
    Abstract: A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: April 17, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Takashi Hashimoto, Yuji Nagaya, Masaki Yoshinaga, Noriaki Hatanaka, Tatsuo Mochizuki, Katsuya Sonoyama
  • Patent number: 6163218
    Abstract: A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: December 19, 2000
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Takashi Hashimoto, Yuji Nagaya, Masaki Yoshinaga, Noriaki Hatanaka, Tatsuo Mochizuki, Katsuya Sonoyama
  • Patent number: 6114905
    Abstract: A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: September 5, 2000
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Information Technology Co., Ltd.
    Inventors: Takashi Hashimoto, Yuji Nagaya, Masaki Yoshinaga, Noriaki Hatanaka, Tatsuo Mochizuki, Katsuya Sonoyama
  • Patent number: 5638012
    Abstract: A write driver for writing write data to a magnetic disk. The write driver is provided with first and second pnp type input transistors whose bases are each supplied with a pair of complementary input signals, and first and second npn type output transistor in the form of an inverted Darlington arrangement. A first resistor element is provided between the emitter of a corresponding pnp type input transistor and the collector of a npn type output transistor, whereas a second resistor element is provided between the common collector of the first and second npn type output transistors and supply voltage. The collectors of the first and second pnp type transistor are supplied with clamp voltage. Third and fourth npn type output transistors each connected to the first and second npn type output transistors in series and subjected to complementary switching control are provided to form a bridge circuit and to drive an inductive head.
    Type: Grant
    Filed: October 18, 1995
    Date of Patent: June 10, 1997
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Takashi Hashimoto, Noriaki Hatanaka, Masaki Yoshinaga, Yuji Nagaya, Tsuyoshi Hirose, Yuji Soga, Tadao Kaji
  • Patent number: 5434717
    Abstract: A timing adjusting circuit is provided to define the operating order of a differential amplifier circuit for amplifying read-out signals and an output circuit in order to minimize changes in output DC level. A damping resistor is disposed between two magnetic head terminals and a clamp circuit in a magnetic head driving circuit. To attend to a composite head configuration, short-circuiting with a power supply and a current flowing into the magnetic head during a non-write operation are detected as abnormalities. In addition, short-circuiting and open-circuiting of the magnetic head are also detected as abnormalities. Also, a read circuit is added to a write magnetic head, in order to output read-out signals in a read mode, so that the read-out signals are utilized for detecting errors in read-out signals from an exclusively designed read head or for detecting and correcting such errors.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: July 18, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Yoshinaga, Yuji Nagaya, Tsuyoshi Hirose, Noriaki Hatanaka, Tomoaki Hirai, Tatsuo Mochizuki
  • Patent number: 5392172
    Abstract: A magnetic head circuit for a plurality of magnetic heads includes two emitter follower transistors for receiving magnetic head writing data, two differential transistors connected to the two emitter follower transistors for performing differential operation control thereover, and two resistors connected to collectors of the two differential transistors for supplying a base current to the two emitter follower transistors, and wherein the emitter follower transistors are connected in series with each other to perform differential switch operations over a magnetic head writing current. A magnetic head fly-back voltage has a clamp voltage which varies according to a writing current flowing through a pair of signal terminals. A pair of differential transistors, whose bases are connected to the pair of signal terminals and whose emitters are connected directly to each other, are operated according to a voltage appearing between the pair of signal terminals.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: February 21, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Yoshinaga, Noriaki Hatanaka, Tomoaki Hirai, Yuji Nagaya, Tsuyoshi Hirose, Tadao Kaji
  • Patent number: 5083208
    Abstract: An electronic zoom apparatus is used in an image pickup device constructing one frame while a raster scanning is performed with respect to image data of first and second fields. The apparatus comprises a memory for storing first image data of the first field and second image data of the second field; a frame making circuit for transmitting a control signal to the memory in accordance with a control signal transmitted from a control section such that the stored first and second image data are synthesized as one frame and are read at random; and an interpolating circuit for performing an interpolation processing with respect to the first and second image data transmitted from the memory by the control signal transmitted from the frame making circuit.
    Type: Grant
    Filed: December 19, 1989
    Date of Patent: January 21, 1992
    Assignee: Ricoh Company, Ltd.
    Inventor: Noriaki Hatanaka
  • Patent number: 5041905
    Abstract: A digital teleconverter includes a component signal generation circuit, an encoder for obtaining a composite signal from the component signal, an image processing unit and a selector for selecting an image processing mode. The component signal generation circuit generates component signals comprising a luminance signal and color difference signals in response to an object image transmitted from an image pickup element. The encoder converts the component signals transmitted from the component signal generation circuit to a composite signal. The image processing unit performs a digital image processing on the basis of either the component signals or the composite signal. The selector selects either a video signal processed by and transmitted from the image processing unit or an original video signal of the object image.
    Type: Grant
    Filed: July 2, 1990
    Date of Patent: August 20, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Noriaki Hatanaka, Katsuhiko Manabe, Takashi Sasaki