Patents by Inventor Noriaki Kaida

Noriaki Kaida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8340147
    Abstract: A laser diode includes an n-type semiconductor region, a p-type semiconductor region, a semiconductor mesa provided between the n-type semiconductor region and the p-type semiconductor region, the semiconductor mesa including an active layer, and a semiconductor burying region located between the n-type semiconductor region and the p-type semiconductor region, the semiconductor burying region being provided on a side face of the semiconductor mesa. The semiconductor burying region includes an n-type semiconductor burying layer and a p-type semiconductor burying layer. The n-type semiconductor burying layer is provided between the p-type semiconductor region and the p-type semiconductor burying layer. The p-type semiconductor burying layer is doped with an element that forms an electron trapping level in the band gap of the p-type semiconductor burying layer.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: December 25, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Noriaki Kaida, Takahiko Kawahara
  • Publication number: 20110090928
    Abstract: A laser diode includes an n-type semiconductor region, a p-type semiconductor region, a semiconductor mesa provided between the n-type semiconductor region and the p-type semiconductor region, the semiconductor mesa including an active layer, and a semiconductor burying region located between the n-type semiconductor region and the p-type semiconductor region, the semiconductor burying region being provided on a side face of the semiconductor mesa. The semiconductor burying region includes an n-type semiconductor burying layer and a p-type semiconductor burying layer. The n-type semiconductor burying layer is provided between the p-type semiconductor region and the p-type semiconductor burying layer. The p-type semiconductor burying layer is doped with an element that forms an electron trapping level in the band gap of the p-type semiconductor burying layer.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 21, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Noriaki KAIDA, Takahiko Kawahara
  • Patent number: 7483461
    Abstract: The present application provides a laser diode that enables to reduce the differential resistance. The laser diode of the invention provides first and second guiding layer in an n-side of an active layer. The first guiding layer is put between the active layer and the n-type cladding layer; while, the second guiding layer is put between the first cladding layer and the active layer. These first and second guiding layers are intrinsic layers or p-type layers, where the conduction band level of the second guiding layer is lower than that of the first guiding layer, while the band gap wavelength of the first guiding layer is shorter than that of the second guiding layer.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Noriaki Kaida
  • Publication number: 20070258497
    Abstract: The present application provides a laser diode that enables to reduce the differential resistance. The laser diode of the invention provides first and second guiding layer in an n-side of an active layer. The first guiding layer is put between the active layer and the n-type cladding layer; while, the second guiding layer is put between the first cladding layer and the active layer. These first and second guiding layers are intrinsic layers or p-type layers, where the conduction band level of the second guiding layer is lower than that of the first guiding layer, while the band gap wavelength of the first guiding layer is shorter than that of the second guiding layer.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 8, 2007
    Inventor: Noriaki Kaida
  • Patent number: 6758607
    Abstract: A package contains therein a semiconductor laser element for emitting light and a semiconductor circuit element for driving the semiconductor laser element and is provided with an optical fiber supporting face and a back face. The optical fiber supporting face is provided for supporting an optical fiber for transmitting the light from the semiconductor laser element, and the back face is opposed to the optical fiber supporting face. The back face has a lead pin for feeding a positive-phase signal into the semiconductor circuit element and a lead pin for feeding a negative-phase signal into the semiconductor circuit element. The lead pins penetrate through the back face. The semiconductor circuit element receives positive-phase and complementary negative-phase signals, both including a high-frequency component of 10 GHz or higher, through the lead pins, converts these signals into a single-ended signal, and outputs the resulting signal to the semiconductor laser element.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: July 6, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Nakabayashi, Noriaki Kaida
  • Publication number: 20020167017
    Abstract: A package 22 contains therein a semiconductor laser element 12 for emitting light and a semiconductor circuit element 14 for driving the semiconductor laser element 12 and is provided with an optical fiber supporting face 44 and an back face 46. The optical fiber supporting face 44 is provided for supporting an optical fiber 16 for transmitting the light from the semiconductor laser element 12, and the back face 46 is opposed to the optical fiber supporting face 44. The back face 46 has a lead pin 31 for feeding a positive-phase signal into the semiconductor circuit element 14 and a lead pin 32 for feeding a negative-phase signal into the semiconductor circuit element. The lead pins 31 and 32 penetrate through the back face 46.
    Type: Application
    Filed: March 11, 2002
    Publication date: November 14, 2002
    Inventors: Takashi Nakabayashi, Noriaki Kaida