Patents by Inventor Noriaki Murakami

Noriaki Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11938688
    Abstract: The present invention relates to a laminate including two or more layers of a composite layer including a fiber substrate and a cured product of a thermosetting resin composition, the two or more layers of the composite layer including one or more layer of a composite layer (X) and one or more layer of a composite layer (Y), the composite layer (X) being a layer including a first fiber substrate constituted by first glass fibers, the composite layer (Y) being a layer including a second fiber substrate constituted by second glass fibers, and the second glass fibers having a higher tensile elastic modulus at 25° C. than the first glass fibers, a printed wiring board including the laminate, a semiconductor package, and a method for producing a laminate.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: March 26, 2024
    Assignee: RESONAC CORPORATION
    Inventors: Noriaki Murakami, Ryoichi Uchimura, Masahisa Ose, Kenichi Ohhashi
  • Patent number: 11463625
    Abstract: An electronic appliance, includes: an imaging apparatus; a display apparatus; and a control apparatus, the control apparatus being configured to: extract, from a moving image captured by the imaging apparatus, subjects included in the moving image and information items each on one of the subjects; generate enlarged-view target information for selecting an enlarged-view target from among the subjects, with reference to the information items; select the enlarged-view target from among the subjects, with reference to the enlarged-view target information; and enlarge a region including the enlarged-view target, and cause the display apparatus to display the moving image.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: October 4, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Mitsuhiro Haneda, Noriaki Murakami, Shohei Takai, Takanori Saito
  • Publication number: 20220080702
    Abstract: The present invention relates to a laminate including two or more layers of a composite layer including a fiber substrate and a cured product of a thermosetting resin composition, the two or more layers of the composite layer including one or more layer of a composite layer (X) and one or more layer of a composite layer (Y), the composite layer (X) being a layer including a first fiber substrate constituted by first glass fibers, the composite layer (Y) being a layer including a second fiber substrate constituted by second glass fibers, and the second glass fibers having a higher tensile elastic modulus at 25° C. than the first glass fibers, a printed wiring board including the laminate, a semiconductor package, and a method for producing a laminate.
    Type: Application
    Filed: December 18, 2019
    Publication date: March 17, 2022
    Inventors: Noriaki MURAKAMI, Ryoichi UCHIMURA, Masahisa OSE, Kenichi OHHASHI
  • Patent number: 11163289
    Abstract: An aspect of the present disclosure more effectively provides notification of information. A control section (10) includes: a person detecting section (13) configured to detect a person in a case where it has been detected that a target event has occurred; an output control section (14) configured to control a speaker (50) to output audio indicating the target event in a case where the target event has occurred; and a command preparing section (15) configured to (i) transmit a rotation instruction to a charging station (2) in a case where detection of a person is to be commenced and (ii) transmit a subtle rotation instruction in a case where the person has been detected.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 2, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noriaki Murakami
  • Publication number: 20210250538
    Abstract: An electronic apparatus includes: a display device; a storage; and a controller, wherein the controller is configured to perform processes of extracting, from a moving picture acquired from the storage, subjects included in the moving picture and information about each of the subjects, selecting a target of magnification display from among the subjects by referring to the information, and controlling the display device to display the moving picture with a region including the target being magnified.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 12, 2021
    Inventors: MITSUHIRO HANEDA, NORIAKI MURAKAMI, SHOHEI TAKAI, TAKANORI SAITO
  • Publication number: 20210250511
    Abstract: An electronic appliance, includes: an imaging apparatus; a display apparatus; and a control apparatus, the control apparatus being configured to: extract, from a moving image captured by the imaging apparatus, subjects included in the moving image and information items each on one of the subjects; generate enlarged-view target information for selecting an enlarged-view target from among the subjects, with reference to the information items; select the enlarged-view target from among the subjects, with reference to the enlarged-view target information; and enlarge a region including the enlarged-view target, and cause the display apparatus to display the moving image.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 12, 2021
    Inventors: MITSUHIRO HANEDA, NORIAKI MURAKAMI, SHOHEI TAKAI, TAKANORI SAITO
  • Patent number: 11069788
    Abstract: To provide a semiconductor device including an electrode having a low contact resistance with the back surface of a GaN substrate and being suitably bonded with solder, and having a low electric resistance of the current flowing in a vertical direction. The semiconductor device has a GaN substrate, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a body electrode, a drain electrode, a source electrode, and a gate electrode. The drain electrode has a Ti layer, an Al layer, a Ti layer, a TiN layer, a Ti layer, a Ni layer, and an Ag layer sequentially from the second surface of the GaN substrate.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 20, 2021
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Noriaki Murakami, Toru Oka
  • Publication number: 20200287012
    Abstract: To provide a semiconductor device including an electrode having a low contact resistance with the back surface of a GaN substrate and being suitably bonded with solder, and having a low electric resistance of the current flowing in a vertical direction. The semiconductor device has a GaN substrate, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a body electrode, a drain electrode, a source electrode, and a gate electrode. The drain electrode has a Ti layer, an Al layer, a Ti layer, a TiN layer, a Ti layer, a Ni layer, and an Ag layer sequentially from the second surface of the GaN substrate.
    Type: Application
    Filed: February 26, 2020
    Publication date: September 10, 2020
    Inventors: Noriaki MURAKAMI, Toru Oka
  • Publication number: 20190369593
    Abstract: An aspect of the present disclosure more effectively provides notification of information. A control section (10) includes: a person detecting section (13) configured to detect a person in a case where it has been detected that a target event has occurred; an output control section (14) configured to control a speaker (50) to output audio indicating the target event in a case where the target event has occurred; and a command preparing section (15) configured to (i) transmit a rotation instruction to a charging station (2) in a case where detection of a person is to be commenced and (ii) transmit a subtle rotation instruction in a case where the person has been detected.
    Type: Application
    Filed: December 20, 2017
    Publication date: December 5, 2019
    Inventor: NORIAKI MURAKAMI
  • Patent number: 10026808
    Abstract: A semiconductor device includes a substrate, a semiconductor layer that is formed on the substrate and includes a pn junction or a hetero-junction, an insulating film that is formed on the semiconductor layer to be in contact with an end of the pn junction or an end of the hetero-junction, and an electrode formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 17, 2018
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Tohru Oka, Kazuya Hasegawa, Noriaki Murakami, Takahiro Sonoyama, Nariaki Tanaka
  • Publication number: 20170263701
    Abstract: A semiconductor device includes a substrate, a semiconductor layer that is formed on the substrate and includes a pn junction or a hetero-junction, an insulating film that is formed on the semiconductor layer to be in contact with an end of the pn junction or an end of the hetero-junction, and an electrode formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.
    Type: Application
    Filed: May 24, 2017
    Publication date: September 14, 2017
    Inventors: Tohru OKA, Kazuye Hasegawa, Noriaki Murakami, Takahiro Sonoyama, Nariaki Tanaka
  • Patent number: 9741578
    Abstract: A technique of reducing the contact resistance between a semiconductor substrate and a metal layer is provided. A manufacturing method of a semiconductor device comprises a process of forming a metal layer on an N surface of a nitride semiconductor substrate. The process of forming the metal layer includes a first process of forming a metal layer by sputtering at a film formation rate controlled to 4 nm/minute or lower.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: August 22, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Kota Yasunishi, Tohru Oka, Noriaki Murakami
  • Patent number: 9711661
    Abstract: A technique of suppressing leak current in a semiconductor device is provided. A semiconductor device, comprises: a semiconductor layer made of a semiconductor; an insulating layer configured to have electric insulation property and formed to cover part of the semiconductor layer; a first electrode layer formed on the semiconductor layer, configured to have a work function of not less than 0.5 eV relative to electron affinity of the semiconductor layer and extended to surface of the insulating layer to form a field plate structure; and a second electrode layer configured to have electrical conductivity and formed to cover at least part of the first electrode layer. A distance between an edge of a part of the first electrode layer that is in contact with the semiconductor layer and the second electrode layer is equal to or greater than 0.2 ?m.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: July 18, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Tohru Oka, Kazuya Hasegawa, Nariaki Tanaka, Noriaki Murakami
  • Patent number: 9691846
    Abstract: A semiconductor device comprises: a semiconductor layer; and an insulating film that is formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: June 27, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Tohru Oka, Kazuya Hasegawa, Noriaki Murakami, Takahiro Sonoyama, Nariaki Tanaka
  • Patent number: 9620608
    Abstract: An object is to use an electrode made of a less expensive material than gold (Au). A semiconductor device comprises: a first titanium layer that is formed to cover at least part of a semiconductor layer and is made of titanium; an aluminum layer that is formed on the first titanium layer on opposite side of the semiconductor layer and mainly consists of aluminum; a titanium nitride layer that is formed on the aluminum layer on opposite side of the first titanium layer and is made of titanium nitride; and an electrode layer that is formed on the titanium nitride layer on opposite side of the aluminum layer and is made of copper.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: April 11, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Noriaki Murakami, Toru Oka
  • Patent number: 9466706
    Abstract: A semiconductor device, comprises: a semiconductor layer, a first gate insulating film, a second gate insulating film and a gate electrode. The semiconductor layer is mainly made of gallium nitride (GaN). The first gate insulating film is formed on the semiconductor layer by atomic layer deposition using ozone as an oxidizing agent and is mainly made of an oxide. The second gate insulating film is formed on the first gate insulating film by atomic layer deposition using oxygen plasma as an oxidizing agent, and is mainly made of an oxide and contains carbon (C) at a lower concentration than that in the first gate insulating film. The gate electrode is formed on the second gate insulating film.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 11, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Noriaki Murakami, Tohru Oka
  • Patent number: 9437525
    Abstract: An object is to use an electrode made of a less expensive material than gold (Au). A semiconductor device comprises: a first titanium layer that is formed to cover at least part of a semiconductor layer and is made of titanium; an aluminum layer that is formed on the first titanium layer on opposite side of the semiconductor layer and mainly consists of aluminum; a titanium nitride layer that is formed on the aluminum layer on opposite side of the first titanium layer and is made of titanium nitride; and an electrode layer that is formed on the titanium nitride layer on opposite side of the aluminum layer and is made of silver.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: September 6, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Noriaki Murakami, Toru Oka
  • Publication number: 20160163792
    Abstract: A semiconductor device comprises: a semiconductor layer; and an insulating film that is formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 9, 2016
    Inventors: Tohru OKA, Kazuya HASEGAWA, Noriaki MURAKAMI, Takahiro SONOYAMA, Nariaki TANAKA
  • Publication number: 20160013282
    Abstract: A semiconductor device, comprises: a semiconductor layer, a first gate insulating film, a second gate insulating film and a gate electrode. The semiconductor layer is mainly made of gallium nitride (GaN). The first gate insulating film is formed on the semiconductor layer by atomic layer deposition using ozone as an oxidizing agent and is mainly made of an oxide. The second gate insulating film is formed on the first gate insulating film by atomic layer deposition using oxygen plasma as an oxidizing agent, and is mainly made of an oxide and contains carbon (C) at a lower concentration than that in the first gate insulating film. The gate electrode is formed on the second gate insulating film.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 14, 2016
    Inventors: Noriaki MURAKAMI, Tohru OKA
  • Publication number: 20150295096
    Abstract: A technique of suppressing leak current in a semiconductor device is provided. A semiconductor device, comprises: a semiconductor layer made of a semiconductor; an insulating layer configured to have electric insulation property and formed to cover part of the semiconductor layer; a first electrode layer formed on the semiconductor layer, configured to have a work function of not less than 0.5 eV relative to electron affinity of the semiconductor layer and extended to surface of the insulating layer to form a field plate structure; and a second electrode layer configured to have electrical conductivity and formed to cover at least part of the first electrode layer. A distance between an edge of a part of the first electrode layer that is in contact with the semiconductor layer and the second electrode layer is equal to or greater than 0.2 ?m.
    Type: Application
    Filed: February 2, 2015
    Publication date: October 15, 2015
    Inventors: Tohru OKA, Kazuya HASEGAWA, Nariaki TANAKA, Noriaki MURAKAMI