Patents by Inventor Noriaki Ono

Noriaki Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170217808
    Abstract: Provided is a biological treatment method and an apparatus that allow organic wastewater from a manufacturing process of electronic devices to be neutralized efficiently during its biological treatment with a less neutralizer in contrast to excessive use thereof in the conventional biological treatment and thereby make it possible to reduce an amount of an inorganic coagulant used in the downstream coagulation step and to reduce salt loads in RO membrane separation and ion exchange treatment. Wastewater from a process of manufacturing electronic devices is passed sequentially through two or more biological treatment tanks that include at least two aerobic biological treatment tanks including the final-stage aerobic biological treatment tank while adding a neutralizer to the biological treatment tank or tanks except the final-stage biological treatment tank so that an M-alkalinity of the liquid in the final-stage biological treatment tank is maintained at not more than 50 mg/L as CaCO3.
    Type: Application
    Filed: July 14, 2015
    Publication date: August 3, 2017
    Inventors: Noriaki ONO, Tetsuro FUKASE, Naoki MATSUTANI
  • Patent number: 7062588
    Abstract: A data processing device exchanges data between a memory and an external bus master. The memory is connected to the data processing device via a first bus so as to store data. The external bus master is connected to the data processing device via a second bus so as to process data. The data processing device comprises a bus-transmission control unit accessing the memory via the first bus in response to a request to access the memory made by the external bus master via the second bus.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: June 13, 2006
    Assignee: Fujitsu Limited
    Inventors: Minoru Usui, Noriaki Ono, Yasushi Nagano
  • Publication number: 20010034805
    Abstract: A data processing device exchanges data between a memory and an external bus master. The memory is connected to the data processing device via a first bus so as to store data. The external bus master is connected to the data processing device via a second bus so as to process data. The data processing device comprises a bus-transmission control unit accessing the memory via the first bus in response to a request to access the memory made by the external bus master via the second bus.
    Type: Application
    Filed: February 22, 2001
    Publication date: October 25, 2001
    Inventors: Minoru Usui, Noriaki Ono, Yasushi Nagano
  • Patent number: 6304931
    Abstract: In a bus control system for generating a series of access requests from an access requesting unit, such as a CPU connected to a common bus including a data bus or an address bus, to a specific access request responding unit, the specific access request responding unit includes a next-address enable signal generating unit for sending a next-address enable signal which represents that a next address can be received, to the access requesting unit before data is transferred or inputted, in accordance with an address representing the access request from the access requesting unit when a read operation or a write operation is executed. Preferably, the access requesting unit includes a next-address enable signal receiving unit for receiving the next-address enable signal from the specific access request responding unit and for sending the next address to the specific access request responding unit.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: October 16, 2001
    Assignee: Fujitsu Limited
    Inventor: Noriaki Ono
  • Patent number: 6078202
    Abstract: Disclosed are a semiconductor device of which a block having a plurality of portions that operate based on a plurality of clocks can be designed and inspected easily, and a method of designing the semiconductor device. First and second clocks whose frequencies are mutually different are used to generate an enabling signal that is validated only during a short period including a transition edge of the second clock. The enabling signal and first clock are supplied to the second portion. The second portion synthesizes the enabling signal and first clock to substantially generate the second clock. Thus, the second portion is regarded as a portion that operates synchronously with the first clock.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: June 20, 2000
    Assignee: Fujitsu Limited
    Inventors: Hideaki Tomatsuri, Hiroyuki Fujiyama, Noriaki Ono, Minoru Usui
  • Patent number: 4512870
    Abstract: A chemical sensing element suitable for measurement of the activity or the concentration of a specific ion contained in an electrolyte is provided with an optically opaque membrane between a gate insulating membrane and an ion sensing membrane of a field-effect type transistor. Since the opaque membrane is provided, extraneous light impinging on a gate is blocked by the opaque membrane, whereby an erroneous potential due to extraneous light is prevented. Accordingly, the accurate measurement of the activity or the concentration of a specific ion contained in an electrolyte may be achieved even in intense ambient light.
    Type: Grant
    Filed: December 2, 1983
    Date of Patent: April 23, 1985
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Satsuki Kohara, Noriaki Ono
  • Patent number: 4440620
    Abstract: A measuring electrode device comprises a pH electrode arranged within an outer casing and having a pH sensitive member in contact with an electrolyte housed in the outer casing. The electrolyte reacts with a predetermined gas in a liquid to be inspected and varies its pH. The pH sensitive member includes a semiconductor substrate and a pH sensitive membrane formed on the substrate and in contact with the electrolyte. The pH sensitive membrane is formed of at least one element selected from the group consisting of silicon nitride, aluminum oxide and tantalum pentoxide. A potential difference is produced between the pH sensitive membrane and the electrolyte in accordance with the variation of the pH of the electrolyte. Thus, a potential difference is produced between the pH electrode and a reference electrode according to the variation of the pH of the electrolyte.
    Type: Grant
    Filed: December 14, 1982
    Date of Patent: April 3, 1984
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Noriaki Ono, Takashi Kamiyama
  • Patent number: 4388167
    Abstract: An ion selective electrode having a silicon wafer substrate secured to one end of a tube made of insulating material by an adhesive agent and an ion sensitive film applied on the outer surface of silicon wafer substrate is disclosed. In order to prevent a portion of a side edge of silicon wafer substrate from being exposed to a sample liquid to be measured, the side edge of silicon wafer substrate is tapered and the ion sensitive film is applied on the tapered side edge as well as on the outer surface of silicon wafer substrate. The tapered side edge may be simply formed by effecting an anisotropic etching for a silicon wafer.
    Type: Grant
    Filed: August 30, 1982
    Date of Patent: June 14, 1983
    Assignee: Olympus Optical Company Limited
    Inventors: Noriaki Ono, Takashi Kamiyama
  • Patent number: 4388165
    Abstract: A selective ion sensitive electrode is so constructed that an ion exchanger sensitive to a specific ion is formed on a metal electrode, an electric conductive resin electrode or a chlorinated metal electrode to which a signal wire is connected so as to maintain a stable electric connection between the signal wire and the ion exchanger over a long period of time. A layer of a silane coupling agent is used between the electrode member and ion exchanger.
    Type: Grant
    Filed: August 31, 1981
    Date of Patent: June 14, 1983
    Assignee: Olympus Optical Company Ltd.
    Inventors: Kiyozo Koshiishi, Noriaki Ono, Takashi Kamiyama, Yoshimi Kato
  • Patent number: 4305132
    Abstract: In measurement of signals containing noise at a known frequency, a method to eliminate noise at a known frequency of T so adapted as to obtain correct value of the signal free from noise by repeating measurements of signal levels at time interval of T/2 and averaging the values obtained by said measurements.
    Type: Grant
    Filed: November 27, 1979
    Date of Patent: December 8, 1981
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Kosaku Tsuboshima, Noriaki Ono, Seiichi Hosoda