Patents by Inventor Noriaki Shimizu

Noriaki Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8771983
    Abstract: A method is disclosed for releasing the transcriptional regulation caused by a repeated sequence in a gene, a kit therefor and so on to thereby establish a system capable of producing a protein in a large amount.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: July 8, 2014
    Assignee: National University of Corporation Hiroshima University
    Inventor: Noriaki Shimizu
  • Patent number: 8137963
    Abstract: A vector of the present invention is a vector for amplifying a target gene in a mammalian cell, the vector including an amplification-activating fragment, which is a partial fragment of a mammalian replication initiation region and has a gene amplification activity site, and a mammalian nuclear matrix attachment region. In the case where the mammalian replication initiation region as described above derives from a c-myc locus, for example, the above-described partial fragment at least contains a duplex unwinding element and a topoisomerase II-binding domain. The vector as described above improves gene transfer efficiency and gene amplification efficiency compared with the existing high gene amplification systems. Thus, a method whereby a “high gene amplification system” developed by the inventors can amplify a target gene with better gene transfer efficiency and a vector to be used in this method are provided.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: March 20, 2012
    Assignee: Hiroshima University
    Inventors: Noriaki Shimizu, Toshihiko Hashizume, Masashi Shimizu
  • Publication number: 20120064631
    Abstract: The present invention provides novel means for amplifying a target gene outside a chromosome of the mammalian cell with a high probability in amplifying a target gene with use of IR/MAR plasmid, to further improve a high-level gene amplification system. The present invention is a method of amplifying a target gene outside a chromosome of a mammalian cell, and includes the step of transferring, concurrently to a mammalian cell, (i) a vector including (a) a mammalian replication initiation region functioning in a mammalian cell and (b) a nuclear matrix attachment region functioning in a mammalian cell, (ii) a target gene, and (iii) a polynucleotide including a telomere repetitive sequence.
    Type: Application
    Filed: March 24, 2010
    Publication date: March 15, 2012
    Applicant: HIROSHIMA UNIVERSITY
    Inventor: Noriaki Shimizu
  • Patent number: 7960187
    Abstract: The present invention provides a recovery processing method to restore the substrate processing apparatus to an operating state after correcting an abnormality having occurred in the substrate processing apparatus in operation and having resulted in a stop in the operation, comprising a substrate retrieval step in which substrate salvage processing is first executed for a wafer W left in a chamber in the substrate processing apparatus in correspondence to the extent to which the wafer has been processed at the time of the operation stop and the substrate having undergone the substrate salvage processing is then retrieved into the cassette storage container and an apparatus internal state restoration step in which the states inside the individual chambers of the substrate processing apparatus are restored.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: June 14, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Shimizu
  • Publication number: 20100317060
    Abstract: A vector of the present invention is a vector for amplifying a target gene in a mammalian cell, the vector including an amplification-activating fragment, which is a partial fragment of a mammalian replication initiation region and has a gene amplification activity site, and a mammalian nuclear matrix attachment region. In the case where the mammalian replication initiation region as described above derives from a c-myc locus, for example, the above-described partial fragment at least contains a duplex unwinding element and a topoisomerase II-binding domain. The vector as described above improves gene transfer efficiency and gene amplification efficiency compared with the existing high gene amplification systems. Thus, a method whereby a “high gene amplification system” developed by the inventors can amplify a target gene with better gene transfer efficiency and a vector to be used in this method are provided.
    Type: Application
    Filed: August 20, 2007
    Publication date: December 16, 2010
    Applicant: Hiroshima University
    Inventors: Noriaki Shimizu, Toshihiko Hashizume, Masashi Tsuruga-shi
  • Patent number: 7640072
    Abstract: A substrate processing apparatus, according to which inspection of various devices in the substrate processing apparatus can be carried out with improved reliability, while reducing the burden on a user. A processing chamber processes semiconductor wafers therein. A transfer chamber transfers the semiconductor wafers. A FOUP (front opening unified pod) houses a plurality of dummy wafers for inspection of the processing chamber or the transfer chamber. A CPU causes an HDD (hard disk drive) to store a housing state relating to the arrangement of the dummy wafers in the FOUP before replacement of dummy wafers in the FOUP and that after the replacement as dummy wafer setup information.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: December 29, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Noriaki Shimizu, Masahiro Numakura
  • Patent number: 7455747
    Abstract: A substrate processing apparatus, according to which inspection of various devices in the substrate processing apparatus can be carried out with improved reliability, while reducing the burden on a user. A processing chamber processes semiconductor wafers therein. A transfer chamber transfers the semiconductor wafers. A FOUP (front opening unified pod) houses a plurality of dummy wafers for inspection of the processing chamber or the transfer chamber. A CPU causes an HDD (hard disk drive) to store a housing state relating to the arrangement of the dummy wafers in the FOUP before replacement of dummy wafers in the FOUP and that after the replacement as dummy wafer setup information.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: November 25, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Noriaki Shimizu, Masahiro Numakura
  • Publication number: 20080223298
    Abstract: The present invention provides a recovery processing method to restore the substrate processing apparatus to an operating state after correcting an abnormality having occurred in the substrate processing apparatus in operation and having resulted in a stop in the operation, comprising a substrate retrieval step in which substrate salvage processing is first executed for a wafer W left in a chamber in the substrate processing apparatus in correspondence to the extent to which the wafer has been processed at the time of the operation stop and the substrate having undergone the substrate salvage processing is then retrieved into the cassette storage container and an apparatus internal state restoration step in which the states inside the individual chambers of the substrate processing apparatus are restored.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 18, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Noriaki SHIMIZU
  • Publication number: 20080228311
    Abstract: A substrate processing apparatus, according to which inspection of various devices in the substrate processing apparatus can be carried out with improved reliability, while reducing the burden on a user. A processing chamber processes semiconductor wafers therein. A transfer chamber transfers the semiconductor wafers. A FOUP (front opening unified pod) houses a plurality of dummy wafers for inspection of the processing chamber or the transfer chamber. A CPU causes an HDD (hard disk drive) to store a housing state relating to the arrangement of the dummy wafers in the FOUP before replacement of dummy wafers in the FOUP and that after the replacement as dummy wafer setup information.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 18, 2008
    Applicant: Tokyo Electron Limited
    Inventors: Noriaki SHIMIZU, Masahiro Numakura
  • Patent number: 7409253
    Abstract: A substrate processing system allows to reduce the number of works that should be done by a software engineer. The system 100 includes a substrate processing apparatus 101; a substrate processing controller 102 for controlling the substrate processing apparatus 101; and a server 103 for storing therein commands, i.e., instructional statements, for defining an operation of each device. The substrate processing controller 102 has a RAM 105 serving as a work space for creating a macro file corresponding to each of processes divided from the whole substrate processing or for changing the content of a macro file; and an executor 108 composed of, e.g., CPU for executing a process sequence macro obtained by a combination of the created macro files. The user creates a macro file describing a sequential operation of each process or changes the content of a macro file by arranging the stored commands.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: August 5, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Noriaki Shimizu, Kimihiro Fukasawa, Kazuhiro Kanaya, Jun Shoji
  • Patent number: 7364922
    Abstract: The present invention provides a recovery processing method to restore the substrate processing apparatus to an operating state after correcting an abnormality having occurred in the substrate processing apparatus in operation and having resulted in a stop in the operation, comprising a substrate retrieval step in which substrate salvage processing is first executed for a wafer W left in a chamber in the substrate processing apparatus in correspondence to the extent to which the wafer has been processed at the time of the operation stop and the substrate having undergone the substrate salvage processing is then retrieved into the cassette storage container and an apparatus internal state restoration step in which the states inside the individual chambers of the substrate processing apparatus are restored.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: April 29, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Noriaki Shimizu
  • Publication number: 20080032341
    Abstract: A method is disclosed for releasing the transcriptional regulation caused by a repeated sequence in a gene, a kit therefor and so on to thereby establish a system capable of producing a protein in a large amount.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 7, 2008
    Inventor: Noriaki Shimizu
  • Publication number: 20070298458
    Abstract: A method is disclosed for releasing the transcriptional regulation caused by a repeated sequence in a gene, a kit therefor and so on to thereby establish a system capable of producing a protein in a large amount.
    Type: Application
    Filed: November 15, 2005
    Publication date: December 27, 2007
    Applicant: NATIONAL UNIVERSITY OF CORPORATION HIROSHIMA UNIVERSITY
    Inventor: Noriaki Shimizu
  • Publication number: 20060162660
    Abstract: The present invention provides a recovery processing method to restore the substrate processing apparatus to an operating state after correcting an abnormality having occurred in the substrate processing apparatus in operation and having resulted in a stop in the operation, comprising a substrate retrieval step in which substrate salvage processing is first executed for a wafer W left in a chamber in the substrate processing apparatus in correspondence to the extent to which the wafer has been processed at the time of the operation stop and the substrate having undergone the substrate salvage processing is then retrieved into the cassette storage container and an apparatus internal state restoration step in which the states inside the individual chambers of the substrate processing apparatus are restored.
    Type: Application
    Filed: January 24, 2006
    Publication date: July 27, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Noriaki Shimizu
  • Publication number: 20060149403
    Abstract: [Purpose] The present invention provides a system and method for processing a substrate while reducing the number of works that should be done by a software engineer; and a program for performing the method. [Constitution] A substrate processing system 100 includes a substrate processing apparatus 101; a substrate processing controller 102 for controlling the substrate processing apparatus 101; and a server 103 for storing therein commands, i.e., instructional statements, for defining an operation of each device. The substrate processing controller 102 has a RAM 105 serving as a work space for creating a macro file corresponding to each of processes divided from the whole substrate processing or for changing the content of a macro file; and an executor 108 composed of, e.g., CPU for executing a process sequence macro obtained by a combination of the created macro files.
    Type: Application
    Filed: April 16, 2004
    Publication date: July 6, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Noriaki Shimizu, Kimihiro Fukasawa, Kazuhiro Kanaya, Jun Shoji
  • Patent number: 6946259
    Abstract: This invention provides methods by which test substances can be screened for their ability to inhibit, enhance or eliminate double minute (DM) or extrachromosomal DNA by micronucleation in cells. This invention also provides a method for inducing maturation or death of a cell having the capacity to generate micronuclei. It also provides a method of treating a disease in a subject, the cells correlated with the disease having DM and extrachromosomal DNA as well as the capacity to generate micronuclei to capture them. Further provided is a method of detecting chromosomal and extrachromosomal DNA in a cell.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: September 20, 2005
    Assignee: The Salk Institute For Biological Studies
    Inventors: Geoffrey M. Wahl, Noriaki Shimizu, Teru Kanda, H. Michael Shepard
  • Publication number: 20050124084
    Abstract: A substrate processing apparatus, according to which inspection of various devices in the substrate processing apparatus can be carried out with improved reliability, while reducing the burden on a user. A processing chamber processes semiconductor wafers therein. A transfer chamber transfers the semiconductor wafers. A FOUP (front opening unified pod) houses a plurality of dummy wafers for inspection of the processing chamber or the transfer chamber. A CPU causes an HDD (hard disk drive) to store a housing state relating to the arrangement of the dummy wafers in the FOUP before replacement of dummy wafers in the FOUP and that after the replacement as dummy wafer setup information.
    Type: Application
    Filed: November 10, 2004
    Publication date: June 9, 2005
    Applicant: Tokyo Electron Limited
    Inventors: Noriaki Shimizu, Masahiro Numakura
  • Publication number: 20050123909
    Abstract: This invention provides methods by which test substances can be screened for their ability to inhibit, enhance or eliminate double minute (DM) or extrachromosomal DNA by micronucleation in cells. This invention also provides a method for inducing maturation or death of a cell having the capacity to generate micronuclei. It also provides a method of treating a disease in a subject, the cells correlated with the disease having DM and extrachromosomal DNA as well as the capacity to generate micronuclei to capture them. Further provided is a method of detecting chromosomal and extrachromosomal DNA in a cell.
    Type: Application
    Filed: January 12, 1999
    Publication date: June 9, 2005
    Inventors: GEOFFREY M. WAHL, NORIAKI SHIMIZU, TERU KANDA, H. MICHAEL SHEPARD
  • Patent number: 6745341
    Abstract: An information processing apparatus having a plurality of CPUs has increased reliability. When one of storage devices suffers a fault, a corresponding control device indicates the fault to other control devices, so that all the control devices can recognize the fault. When either one of the CPUs has accessed the storage device, the control device indicates the occurrence of the fault to the CPU. Upon reception of the indication of the occurrence of the fault, the CPU changes the storage device for an active system, if necessary, according to predetermined rules. The same processing is performed when other CPUs have accessed the storage device. As a result, when all the CPUs have accessed the storage device, the setting up of the active system is completed.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: June 1, 2004
    Assignee: Fujitsu Limited
    Inventors: Shinichi Onitsuka, Toshinori Hiraishi, Akihiko Hisada, Noriaki Shimizu, Noboru Izumi
  • Patent number: 6537758
    Abstract: The present invention provides a method for isolating nucleic acid from micronuclei separated from a cell that involves separating micronuclei from a cell and isolating nucleic acid from the micronuclei.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: March 25, 2003
    Assignee: The Salk Institute for Biological Studies
    Inventors: Geoffrey M. Wahl, Noriaki Shimizu