Abstract: A push wave transmission unit transmits a push wave to a biological tissue of a subject. A tracking wave transmission/reception unit transmits a tracking wave to the biological tissue and receives a reflected ultrasound wave reflected by the biological tissue. An elasticity analysis unit measures a propagation velocity of a shear wave generated in the biological tissue by the push wave and measures an elastic property of the biological tissue based on the propagation velocity, and measures the propagation velocity of the shear wave based on a measurement signal obtained by the reflected ultrasound wave received by the tracking wave transmission/reception unit. A controller determines whether to re-measure the elastic property according to an unnecessary component included in the measurement signal. When determining to re-measure the elastic property, the ultrasound diagnostic apparatus re-measures the elastic property by changing an acoustic property of the push wave according to the unnecessary component.

Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.

Abstract: There is provided a converter control circuit including: a high-side switching element connected between an input voltage terminal and an inductive load; a low-side switching element connected between the inductive load and a reference potential; a drive circuit configured to drive a gate of the switching elements; a drive switch connected to the gate of at least one of the switching elements in parallel with the drive circuit; and a drive switch control circuit switching the drive switch from ON to OFF when the gate voltage of the switching element with the gate connected to the drive switch reaches a prescribed threshold while the switching element is driven by the drive circuit.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: According to the present invention, a semiconductor device is provided wherein a stepdown-type DC-DC converter includes a first off detection circuit, a second off detection circuit, a capacitor, a capacitor, a diode, inverters, an inductor, a first level shift circuit, a second level shift circuit, a third level shift circuit, a 2-input NAND circuit, a 2-input NAND circuit, a high-side N-channel power MOS transistor and a low-side N-channel power MOS transistor. The first off detection circuit and the second off detection circuit reduce fall times of the gates of the N-channel power MOS transistors, thereby reducing dead time.

Abstract: A semiconductor manufacturing apparatus having a plurality of portions according to this invention includes a storage device which stores, for each portion, information representing the lapsed time of use or the product processing count till occurrence of a failure after installation of the portion, and a calculation device which receives the information stored in the storage device and outputs function information representing a failure probability and/or failure rate as a function of the lapsed time of use or the product processing count for each portion.

Abstract: A semiconductor device having conversion units which change the reference potential of an input signal to a first or second reference potential and outputs the input signal to a first drive unit or second drive unit, change the reference potential of a first control signal output from the first drive unit to the second reference potential and outputs the first control signal to the second drive unit, and changes the reference potential of a second control signal output from the second drive unit to the first reference potential and outputs the second control signal to the first drive unit, wherein the conversion units increase currents flowing through the conversion units on the basis of a time when the input signal changes.

Abstract: Receivable channels in a program guide G used for selecting a program are arranged using the longitudinal axis of the program guide G itself as a time base and using the horizontal axis as a channel axis. A channel being currently viewed is disposed at the left end. From the right side of the channel, the other channels are arranged in decreasing order of the viewing frequency from left to right, and programs of the other channels are disposed along the time base.

Abstract: According to the present invention, a semiconductor device is provided wherein a stepdown-type DC-DC converter includes a first off detection circuit, a second off detection circuit, a capacitor, a capacitor, a diode, inverters, an inductor, a first level shift circuit, a second level shift circuit, a third level shift circuit, a 2-input NAND circuit, a 2-input NAND circuit, a high-side N-channel power MOS transistor and a low-side N-channel power MOS transistor. The first off detection circuit and the second off detection circuit reduce fall times of the gates of the N-channel power MOS transistors, thereby reducing dead time.

Abstract: A semiconductor device having conversion units which change the reference potential of an input signal to a first or second reference potential and outputs the input signal to a first drive unit or second drive unit , change the reference potential of a first control signal output from the first drive unit to the second reference potential and outputs the first control signal to the second drive unit, and changes the reference potential of a second control signal output from the second drive unit to the first reference potential and outputs the second control signal to the first drive unit, wherein the conversion units increase currents flowing through the conversion units on the basis of a time when the input signal changes.

Abstract: According to the present invention, a semiconductor device is provided wherein a stepdown-type DC-DC converter includes a first off detection circuit, a second off detection circuit, a capacitor, a capacitor, a diode, inverters, an inductor, a first level shift circuit, a second level shift circuit, a third level shift circuit, a 2-input NAND circuit, a 2-input NAND circuit, a high-side N-channel power MOS transistor and a low-side N-channel power MOS transistor. The first off detection circuit and the second off detection circuit reduce fall times of the gates of the N-channel power MOS transistors, thereby reducing dead time.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.

Abstract: According to this invention, there is provided a semiconductor device having conversion units which change the reference potential of an input signal to a first or second reference potential and outputs the input signal to a first drive unit or second drive unit, change the reference potential of a first control signal output from the first drive unit to the second reference potential and outputs the first control signal to the second drive unit, and changes the reference potential of a second control signal output from the second drive unit to the first reference potential and outputs the second control signal to the first drive unit, wherein the conversion units increase currents flowing through the conversion units on the basis of a time when the input signal changes.

Abstract: According to the present invention, a semiconductor device is provided wherein a stepdown-type DC-DC converter includes a first off detection circuit, a second off detection circuit, a capacitor, a capacitor, a diode, inverters, an inductor, a first level shift circuit, a second level shift circuit, a third level shift circuit, a 2-input NAND circuit, a 2-input NAND circuit, a high-side N-channel power MOS transistor and a low-side N-channel power MOS transistor. The first off detection circuit and the second off detection circuit reduce fall times of the gates of the N-channel power MOS transistors, thereby reducing dead time.

Abstract: According to this invention, there is provided a semiconductor device having conversion units which change the reference potential of an input signal to a first or second reference potential and outputs the input signal to a first drive unit or second drive unit, change the reference potential of a first control signal output from the first drive unit to the second reference potential and outputs the first control signal to the second drive unit, and changes the reference potential of a second control signal output from the second drive unit to the first reference potential and outputs the second control signal to the first drive unit, wherein the conversion units increase currents flowing through the conversion units on the basis of a time when the input signal changes.

Abstract: A semiconductor manufacturing apparatus having a plurality of portions according to this invention includes a storage device which stores, for each portion, information representing the lapsed time of use or the product processing count till occurrence of a failure after installation of the portion, and a calculation device which receives the information stored in the storage device and outputs function information representing a failure probability and/or failure rate as a function of the lapsed time of use or the product processing count for each portion.

Abstract: A semiconductor manufacturing apparatus having a plurality of portions according to this invention includes a storage device which stores, for each portion, information representing the lapsed time of use or the product processing count till occurrence of a failure after installation of the portion, and a calculation device which receives the information stored in the storage device and outputs function information representing a failure probability and/or failure rate as a function of the lapsed time of use or the product processing count for each portion.

Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.