Patents by Inventor Norifumi Kameshiro

Norifumi Kameshiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11589013
    Abstract: An automatic display system for a gaze area has a video input unit, an object detection unit and a gaze area setting unit that sets an area containing a part or the whole of the object detected by the object detection unit, or a predetermined area in the entire video as the gaze area. A control signal corresponding to the set gaze area information is received, and a gaze area acquisition unit acquires the gaze area from the entire video according to the control signal. A video output unit outputs a video of the acquired gaze area. The video input unit, a control signal receiving unit, and the gaze area acquisition unit are disposed in the input terminal; the gaze area setting unit and the video output unit are disposed in the output terminal; and information is transmitted between the input terminal and the output terminal by wireless communication.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 21, 2023
    Assignee: HITACHI, LTD.
    Inventors: Norifumi Kameshiro, Keisuke Yamamoto
  • Publication number: 20220385861
    Abstract: An automatic display system for a gaze area has a video input unit, an object detection unit and a gaze area setting unit that sets an area containing a part or the whole of the object detected by the object detection unit, or a predetermined area in the entire video as the gaze area. A control signal corresponding to the set gaze area information is received, and a gaze area acquisition unit acquires the gaze area from the entire video according to the control signal. A video output unit outputs a video of the acquired gaze area. The video input unit, a control signal receiving unit, and the gaze area acquisition unit are disposed in the input terminal; the gaze area setting unit and the video output unit are disposed in the output terminal; and information is transmitted between the input terminal and the output terminal by wireless communication.
    Type: Application
    Filed: March 31, 2022
    Publication date: December 1, 2022
    Inventors: Norifumi KAMESHIRO, Keisuke YAMAMOTO
  • Publication number: 20220283570
    Abstract: Computation is made of a production plan and sequence satisfying constraint conditions using an interaction model. A system includes a storage device to store management information about specifications on each of a plurality of things to be produced and a computational device to compute a planned sequence of things to be produced in a production process to produce the plurality of things using an interaction model, based on the management information. In this system, the computational device computes an interaction model in which an assignment event of a sequential position in a production process to each of the things is assumed as a variable and a constraint condition regarding the production process is set as strength of an interaction between variables.
    Type: Application
    Filed: March 26, 2020
    Publication date: September 8, 2022
    Inventors: Norifumi KAMESHIRO, Takuya OKUYAMA
  • Patent number: 11423299
    Abstract: A device includes an input unit, a nonlinear converter, and an output unit. The nonlinear converter and the output unit are connected via a connection path having a delay mechanism that realizes a feedback loop giving a delay to a signal. The delay mechanism includes a conversion mechanism that generates a plurality of signals with different delay times using the signal output from the nonlinear converter, generates a new signal by superimposing the plurality of signals, and outputs the generated signal to the output unit.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: August 23, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Tadashi Okumura, Mitsuharu Tai, Masahiko Ando, Sanato Nagata, Norifumi Kameshiro
  • Patent number: 11119228
    Abstract: There is provided a radiation detector using SiC and of a structure in which an electric field is applied to the interior of the entire SiC crystal constituting a radiation sensible layer, aiming to detect radiation while suppressing a reduction in electric signals generated in the radiation sensible layer.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: September 14, 2021
    Assignee: HITACHI, LTD.
    Inventors: Norifumi Kameshiro, Akio Shima
  • Publication number: 20190227044
    Abstract: An artificial olfactory sensing system includes a sensor unit. The sensor unit includes a semiconductor device equipped with a transistor and a sensor cell in which an olfactory receptor is manifested on a lipid film. A proton adsorption film is formed on a gate electrode of the transistor. A physiological aqueous solution is disposed on the proton adsorption film. Then, the sensor cell is disposed in the physiological aqueous solution. A proton is adsorbed onto the proton adsorption film. When the olfactory receptor recognizes an odor molecule, the positive ions in the physiological aqueous solution flow from an ion channel of the olfactory receptor into the sensor cell. As a result, the proton is dissociated from the proton adsorption film into the physiological aqueous solution, and the potential of the gate electrode is changed.
    Type: Application
    Filed: January 17, 2019
    Publication date: July 25, 2019
    Inventors: Masahiko ANDO, Norifumi KAMESHIRO, Tadashi OKUMURA, Sanato NAGATA, Ryohei KANZAKI, Daigo TERUTSUKI, Hidefumi MITSUNO, Takeshi SAKURAI
  • Patent number: 10338046
    Abstract: An object of the present invention is to provide an artificial olfactory sensing system capable of sniffing out various odors highly sensitively. The artificial olfactory sensing system includes: plural sensor cells on a lipid membrane of each of which olfactory receptors have developed; and plural ion-sensitive field-effect transistors (ISFETs) that correspondingly exist to the sensor cells on a one-on-one basis. A response signal showing that each of the olfactory receptors of each of the sensor cells has recognized an odor molecule is converted into an electric signal by an ISFET corresponding to each of the sensor cells.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: July 2, 2019
    Assignee: HITACHI, LTD.
    Inventors: Masahiko Ando, Sanato Nagata, Shirun Ho, Yuji Suwa, Mitsuharu Tai, Kenzo Kurotsuchi, Hiromasa Takahashi, Norifumi Kameshiro, Seiichi Suzuki
  • Publication number: 20190164053
    Abstract: A device includes an input unit, a nonlinear converter, and an output unit. The nonlinear converter and the output unit are connected via a connection path having a delay mechanism that realizes a feedback loop giving a delay to a signal. The delay mechanism includes a conversion mechanism that generates a plurality of signals with different delay times using the signal output from the nonlinear converter, generates a new signal by superimposing the plurality of signals, and outputs the generated signal to the output unit.
    Type: Application
    Filed: November 29, 2018
    Publication date: May 30, 2019
    Inventors: Tadashi OKUMURA, Mitsuharu TAI, Masahiko ANDO, Sanato NAGATA, Norifumi KAMESHIRO
  • Publication number: 20180293495
    Abstract: A computer system that executes computation processing using a recurrent neural network constituted with an input unit, a reservoir unit, and an output unit. The input unit includes an input node that receives a plurality of time-series data, the reservoir unit includes a nonlinear node accompanying time delay, the output unit includes an output node calculating an output value. The input unit calculates a plurality of input streams by executing sample and hold processing and mask processing on a plurality of received time-series data, executes time shift processing that gives deviation in time to each of the plurality of input streams and superimposes the plurality of input streams subjected to the time shift processing, thereby calculating input data.
    Type: Application
    Filed: February 21, 2018
    Publication date: October 11, 2018
    Inventors: Tadashi OKUMURA, Mitsuharu TAl, Hiromasa TAKAHASHI, Masahiko ANDO, Norifumi KAMESHIRO, Sanato NAGATA
  • Publication number: 20180267005
    Abstract: An object of the present invention is to provide an artificial olfactory sensing system capable of sniffing out various odors highly sensitively. The artificial olfactory sensing system includes: plural sensor cells on a lipid membrane of each of which olfactory receptors have developed; and plural ion-sensitive field-effect transistors (ISFETs) that correspondingly exist to the sensor cells on a one-on-one basis. A response signal showing that each of the olfactory receptors of each of the sensor cells has recognized an odor molecule is converted into an electric signal by an ISFET corresponding to each of the sensor cells.
    Type: Application
    Filed: January 5, 2015
    Publication date: September 20, 2018
    Applicant: Hitachi, Ltd.
    Inventors: Masahiko ANDO, Sanato NAGATA, Shirun HO, Yuji SUWA, Mitsuharu TAI, Kenzo KUROTSUCHI, Hiromasa TAKAHASHI, Norifumi KAMESHIRO, Seiichi SUZUKI
  • Publication number: 20180059263
    Abstract: There is provided a radiation detector using SiC and of a structure in which an electric field is applied to the interior of the entire SiC crystal constituting a radiation sensible layer, aiming to detect radiation while suppressing a reduction in electric signals generated in the radiation sensible layer.
    Type: Application
    Filed: July 6, 2015
    Publication date: March 1, 2018
    Inventors: Norifumi KAMESHIRO, Akio SHIMA
  • Publication number: 20180003663
    Abstract: There is a provided a chemical sensor that includes a semiconductor substrate of a first conductivity type, a first electrode that is formed on a front surface of the semiconductor substrate, a second electrode that is disposed to face the first electrode in a vertical direction, a flow path in which a liquid or a gas can flow between the first electrode and the second electrode, and a chemical substance capturing portion that is disposed in at least a partial region between the first electrode and the second electrode in the flow path, and bonded with a predetermined chemical substance, and in which a distance between the first electrode and the second electrode is set to be 2 nm or more and 200 nm or less, and a change in dielectric constant between the first electrode and the second electrode is detected.
    Type: Application
    Filed: May 12, 2017
    Publication date: January 4, 2018
    Inventors: Norifumi KAMESHIRO, Hiromasa TAKAHASHI, Sanato NAGATA, Shirun HO
  • Patent number: 9755014
    Abstract: A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to 4.4×1017 cm?3 or higher and 6×1017 cm?3 or lower and an impurity concentration in a second JTE region is set to 2×1017 cm?3 or lower in a case of a Schottky diode, and an impurity concentration in the first JTE region is set to 6×1017 cm?3 or higher and 8×1017 cm?3 or lower and an impurity concentration in the second JTE region is set to 2×1017 cm?3 or lower in a case of a junction barrier Schottky diode.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: September 5, 2017
    Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Kazuhiro Mochizuki, Hidekatsu Onose, Norifumi Kameshiro, Natsuki Yokoyama
  • Patent number: 9711600
    Abstract: In a semiconductor device having a silicon carbide device, a technique capable of suppressing variation in a breakdown voltage and achieving reduction in an area of a termination structure is provided. In order to solve the above-described problem, in the present invention, in a semiconductor device having a silicon carbide device, a p-type first region and a p-type second region provided to be closer to an outer peripheral side than the first region are provided in a junction termination portion, a first concentration gradient is provided in the first region, and a second concentration gradient larger than the first concentration gradient is provided in the second region.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: July 18, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiro Mochizuki, Norifumi Kameshiro
  • Publication number: 20170018605
    Abstract: A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to 4.4×1017 cm?3 or higher and 6×1017 cm?3 or lower and an impurity concentration in a second JTE region is set to 2×1017 cm?3 or lower in a case of a Schottky diode, and an impurity concentration in the first JTE region is set to 6×1017 cm?3 or higher and 8×107 cm?3 or lower and an impurity concentration in the second JTE region is set to 2×1017 cm?3 or lower in a case of a junction barrier Schottky diode.
    Type: Application
    Filed: September 28, 2016
    Publication date: January 19, 2017
    Inventors: Kazuhiro MOCHIZUKI, Hidekatsu ONOSE, Norifumi KAMESHIRO, Natsuki YOKOYAMA
  • Patent number: 9478605
    Abstract: A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to 4.4×1017 cm?3 or higher and 6×1017 cm?3 or lower and an impurity concentration in a second JTE region is set to 2×1017 cm?3 or lower in a case of a Schottky diode, and an impurity concentration in the first JTE region is set to 6×1017 cm?3 or higher and 8×1017 cm?3 or lower and an impurity concentration in the second JTE region is set to 2×1017 cm?3 or lower in a case of a junction barrier Schottky diode.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: October 25, 2016
    Assignee: Hitachi Power Semiconductor Device, Ltd.
    Inventors: Kazuhiro Mochizuki, Hidekatsu Onose, Norifumi Kameshiro, Natsuki Yokoyama
  • Publication number: 20160218187
    Abstract: In a semiconductor device having a silicon carbide device, a technique capable of suppressing variation in a breakdown voltage and achieving reduction in an area of a termination structure is provided. In order to solve the above-described problem, in the present invention, in a semiconductor device having a silicon carbide device, a p-type first region and a p-type second region provided to be closer to an outer peripheral side than the first region are provided in a junction termination portion, a first concentration gradient is provided in the first region, and a second concentration gradient larger than the first concentration gradient is provided in the second region.
    Type: Application
    Filed: September 9, 2013
    Publication date: July 28, 2016
    Inventors: Kazuhiro MOCHIZUKI, Norifumi KAMESHIRO
  • Publication number: 20160005810
    Abstract: A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to 4.4×1017 cm?3 or higher and 6×1017 cm?3 or lower and an impurity concentration in a second JTE region is set to 2×1017 cm?3 or lower in a case of a Schottky diode, and an impurity concentration in the first JTE region is set to 6×1017 cm?3 or higher and 8×1017 cm?3 or lower and an impurity concentration in the second JTE region is set to 2×1017 cm?3 or lower in a case of a junction barrier Schottky diode.
    Type: Application
    Filed: December 10, 2013
    Publication date: January 7, 2016
    Inventors: Kazuhiro MOCHIZUKI, Hidekatsu ONOSE, Norifumi KAMESHIRO, Natsuki YOKOYAMA
  • Patent number: 9159562
    Abstract: A Schottky junction type semiconductor device in which the opening width of a trench can be decreased without deteriorating the withstanding voltage. The cross sectional shape of a trench has a shape of a sub-trench in which the central portion is higher and the periphery is lower at the bottom of the trench, and a p type impurity is introduced vertically to the surface of the drift layer thereby forming a p+ SiC region, which is formed in contact to the inner wall of the trench having the sub-trench disposed therein, such that the junction position is formed more deeply in the periphery of the bottom of the trench than the junction position in the central portion of the bottom of the trench.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: October 13, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Kumiko Konishi, Natsuki Yokoyama, Norifumi Kameshiro
  • Patent number: 8890169
    Abstract: On a front surface of a region where a junction termination extension structure of a semiconductor device using silicon carbide is formed, a structure having an n-type semiconductor region with a concentration relatively higher than a concentration of an n?-type drift layer is formed. An edge of the junction termination extension structure located on a side away from an active region is surrounded from its bottom surface to its front surface by an n-type semiconductor region. By this means, it is possible to provide a device with a low resistance while ensuring a withstand voltage, or by decreasing the resistance of the device, it is possible to provide a device with low power loss.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: November 18, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Norifumi Kameshiro, Haruka Shimizu