Patents by Inventor Norifumi Tsuboi

Norifumi Tsuboi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105685
    Abstract: The present technology relates to a display module and a manufacturing method, and a display apparatus that enable visual quality to be improved. A display module includes a display section and a film disposed on the display section to reduce light incident from outside and that is reflected from the display section. The display section includes an electronic board and a plurality of LED elements juxtaposed at predetermined intervals on a surface of the electronic board, the surface being on the film side. A distance from the LED element positioned closest to an end of the display section to the end of the display section is equal to or shorter than half the predetermined interval. The present technology is applicable to a LED tiling display.
    Type: Application
    Filed: November 26, 2021
    Publication date: March 28, 2024
    Inventors: HISANORI TSUBOI, MASANOBU KIMURA, NORIFUMI KIKUCHI
  • Publication number: 20160266974
    Abstract: According to one embodiment, a memory controller includes a bank controller including a queuing part queuing commands associated with a bank and having a first flag associated with each of the commands, the bank controller executing the commands in order, a data controller transferring write data to the bank when a particular command to be executed among the commands is a write command associated with one of physical addresses in the bank, and a parity controller generating parity data for restoring the write data based on a value of a first flag associated with the particular command, before execution of the particular command is completed.
    Type: Application
    Filed: June 29, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jun ICHISHIMA, Kenji Yoshida, Yoriharu Takai, Susumu Yamazaki, Norifumi Tsuboi
  • Publication number: 20160224419
    Abstract: According to one embodiment, there is provided a device including a non-volatile memory and a controller. The non-volatile memory includes a memory cell array and an internal buffer. The controller is configured to, after failure of an error correcting process of first data read from the memory cell array, store second data generated from the first data in the internal buffer and read the stored second data from the internal buffer to perform the error correcting process.
    Type: Application
    Filed: July 2, 2015
    Publication date: August 4, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoriharu TAKAI, Kenji YOSHIDA, Susumu YAMAZAKI, Norifumi TSUBOI, Jun ICHISHIMA
  • Patent number: 9235504
    Abstract: According to one embodiment, a storage control apparatus includes an interface and a controller. The interface transfers data or a command to or from a nonvolatile memory including a storage area for each of banks. The controller controls read operations for the banks in accordance with generation of access requests to the banks, respectively. The controller prioritizes performing read-command issuance processing included in each of the read operations.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: January 12, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jun Ichishima, Norifumi Tsuboi
  • Publication number: 20150143062
    Abstract: A controller of an embodiment includes: an interface unit configured to be connected to a storage unit and configured to execute a command performing one or more basic operations for the storage unit in a predetermined order; and a control unit configured to hold, for each category to which the basic operations belong, a control procedure of a signal between the interface unit and the storage unit during execution of the basic operations which belong to the category. The control unit is configured to obtain the basic operations constituting the command executed by the interface unit based on first information indicating the basic operations constituting the command and an order of execution of the basic operations, and to cause the interface unit to execute the obtained basic operations based on second information indicating the category to which the basic operations belong in the order indicated in the first information.
    Type: Application
    Filed: March 12, 2014
    Publication date: May 21, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Norifumi TSUBOI, Jun ICHISHIMA
  • Publication number: 20150026388
    Abstract: According to one embodiment, a storage control apparatus includes an interface and a controller. The interface transfers data or a command to or from a nonvolatile memory including a storage area for each of banks. The controller controls read operations for the banks in accordance with generation of access requests to the banks, respectively. The controller prioritizes performing read-command issuance processing included in each of the read operations.
    Type: Application
    Filed: August 30, 2013
    Publication date: January 22, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jun Ichishima, Norifumi Tsuboi
  • Publication number: 20120324165
    Abstract: According to one embodiment, a memory control device includes: a buffer memory; a cache memory performing caching for the buffer memory on a unit-data-by-unit-data basis; and an adding module adding ByteECC data to the unit data.
    Type: Application
    Filed: February 24, 2012
    Publication date: December 20, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Norifumi Tsuboi, Kenji Yoshida