Patents by Inventor NORIHIKO MATSUZAKA
NORIHIKO MATSUZAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942278Abstract: Provided is a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, wherein the capacitance portion has an opening which extends in a lamination direction in which the plurality of electrode layers and the dielectric layer are laminated and through which one electrode layer of the plurality of electrode layers is exposed, the one electrode layer has an exposed portion exposed at a bottom surface of the opening, the exposed portion is in contact with a wiring layer connecting the one electrode layer and an electrode terminal, and a thickness of the exposed portion of the one electrode layer is smaller than a thickness of other portions of the one electrode layer and is 50% or more of the thickness of the other portions of the one electrode layer.Type: GrantFiled: October 20, 2021Date of Patent: March 26, 2024Assignee: TDK CorporationInventors: Michihiro Kumagae, Kazuhiro Yoshikawa, Kenichi Yoshida, Junki Nakamoto, Norihiko Matsuzaka
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Publication number: 20220044875Abstract: Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.Type: ApplicationFiled: October 20, 2021Publication date: February 10, 2022Applicant: TDK CorporationInventors: Michihiro KUMAGAE, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA, Junki NAKAMOTO, Norihiko MATSUZAKA
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Patent number: 11195661Abstract: Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.Type: GrantFiled: March 6, 2019Date of Patent: December 7, 2021Assignee: TDK CorporationInventors: Michihiro Kumagae, Kazuhiro Yoshikawa, Kenichi Yoshida, Junki Nakamoto, Norihiko Matsuzaka
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Publication number: 20190279823Abstract: Provided is a manufacturing method of a thin film capacitor comprising a capacitance portion in which at least one dielectric layer is sandwiched between a pair of electrode layers included in a plurality of electrode layers, the manufacturing method including a lamination process of alternately laminating the plurality of electrode layers and a dielectric film and forming a laminated body which will be the capacitance portion, a first etching process of forming an opening extending in a laminating direction with respect to the laminated body and exposing the dielectric film laminated directly on one of the plurality of electrode layers on a bottom surface of the opening, and a second etching process of exposing the one electrode layer at the bottom surface of the opening. In the second etching process, an etching rate of the one electrode layer is lower than an etching rate of the dielectric film.Type: ApplicationFiled: March 6, 2019Publication date: September 12, 2019Applicant: TDK CorporationInventors: Michihiro KUMAGAE, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA, Junki NAKAMOTO, Norihiko MATSUZAKA
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Patent number: 10319524Abstract: A thin-film capacitor includes electrode layers stacked in a stacking direction; dielectric layers stacked between the electrode layers; an opening portion that includes a side surface penetrating at least a part of the electrode layers and at least a part of the dielectric layers in the stacking direction from a top side and a bottom surface exposing one of the electrode layers; and a wiring portion disposed in the opening portion to be separated from the side surface of the opening portion, and electrically connected to the electrode layer exposed from the bottom surface of the opening portion. The dielectric layer that is stacked immediately on the electrode layer exposed from the bottom surface of the opening portion among the dielectric layers includes an extension portion extending in the opening portion from the side surface of the opening portion to the wiring portion side.Type: GrantFiled: October 5, 2017Date of Patent: June 11, 2019Assignee: TDK CORPORATIONInventors: Kenichi Yoshida, Kazuhiro Yoshikawa, Michihiro Kumagae, Norihiko Matsuzaka, Junki Nakamoto
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Patent number: 10153092Abstract: A thin-film capacitor including a stacked body having a lower electrode layer, a plurality of dielectric layers stacked on the lower electrode layer, one or more internal electrode layers interposed between the dielectric layers, and an upper electrode layer that is stacked on the opposite side of the lower electrode layer with the dielectric layers and the internal electrode layers interposed between, and a cover layer that covers the stacked body. The stacked body includes opening portions that have the lower electrode layer, opens upward in a stacking direction, and has a side surface formed to include an inclined surface. The cover layer is stacked on the inclined surface of the stacked body. A curved surface with a predetermined shape is formed on the inclined surface for each pair of layers including the dielectric layer forming the inclined surface and the electrode layer, forming the inclined surface.Type: GrantFiled: October 5, 2017Date of Patent: December 11, 2018Assignee: TDK CORPORATIONInventors: Michihiro Kumagae, Akifumi Kamijima, Norihiko Matsuzaka, Junki Nakamoto, Kazuhiro Yoshikawa, Kenichi Yoshida
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Publication number: 20180102219Abstract: A thin-film capacitor including a stacked body having a lower electrode layer, a plurality of dielectric layers stacked on the lower electrode layer, one or more internal electrode layers interposed between the dielectric layers, and an upper electrode layer that is stacked on the opposite side of the lower electrode layer with the dielectric layers and the internal electrode layers interposed between, and a cover layer that covers the stacked body. The stacked body includes opening portions that have the lower electrode layer, opens upward in a stacking direction, and has a side surface formed to include an inclined surface. The cover layer is stacked on the inclined surface of the stacked body. A curved surface with a predetermined shape is formed on the inclined surface for each pair of layers including the dielectric layer forming the inclined surface and the electrode layer, forming the inclined surface.Type: ApplicationFiled: October 5, 2017Publication date: April 12, 2018Applicant: TDK CORPORATIONInventors: Michihiro KUMAGAE, Akifumi KAMIJIMA, Norihiko MATSUZAKA, Junki NAKAMOTO, Kazuhiro YOSHIKAWA, Kenichi YOSHIDA
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Publication number: 20180102218Abstract: A thin-film capacitor includes electrode layers stacked in a stacking direction; dielectric layers stacked between the electrode layers; an opening portion that includes a side surface penetrating at least a part of the electrode layers and at least a part of the dielectric layers in the stacking direction from a top side and a bottom surface exposing one of the electrode layers; and a wiring portion disposed in the opening portion to be separated from the side surface of the opening portion, and electrically connected to the electrode layer exposed from the bottom surface of the opening portion. The dielectric layer that is stacked immediately on the electrode layer exposed from the bottom surface of the opening portion among the dielectric layers includes an extension portion extending in the opening portion from the side surface of the opening portion to the wiring portion side.Type: ApplicationFiled: October 5, 2017Publication date: April 12, 2018Applicant: TDK CORPORATIONInventors: Kenichi YOSHIDA, Kazuhiro YOSHIKAWA, Michihiro KUMAGAE, Norihiko MATSUZAKA, Junki NAKAMOTO
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Patent number: 8435862Abstract: The method of manufacturing a semiconductor device comprises forming a metal film over silicon regions and insulating films; performing a first heat treatment under an oxygen atmosphere containing oxygen as a main ingredient, to form a first silicide film in the silicon region by reacting the metal film and the silicon region, and to simultaneously form a metal oxide by oxidizing the entire surface of the metal film from the surface side thereof; and selectively removing the metal oxide and the unreacted metal film using a chemical.Type: GrantFiled: March 23, 2011Date of Patent: May 7, 2013Assignee: Renesas Electronics CorporationInventors: Takashi Tonegawa, Tomotake Morita, Norihiko Matsuzaka
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Publication number: 20110237074Abstract: The method of manufacturing a semiconductor device comprises forming a metal film over silicon regions and insulating films; performing a first heat treatment under an oxygen atmosphere containing oxygen as a main ingredient, to form a first silicide film in the silicon region by reacting the metal film and the silicon region, and to simultaneously form a metal oxide by oxidizing the entire surface of the metal film from the surface side thereof; and selectively removing the metal oxide and the unreacted metal film using a chemical.Type: ApplicationFiled: March 23, 2011Publication date: September 29, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: TAKASHI TONEGAWA, TOMOTAKE MORITA, NORIHIKO MATSUZAKA