Patents by Inventor Norihiko Samoto

Norihiko Samoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6461889
    Abstract: A method of fabricating a semiconductor device that makes it possible to decrease the thermal resistance of the semiconductor device is provided. First, a semiconductor base layer is formed over a main surface of a semiconductor substrate. Then, the semiconductor base layer on which the at least one device structure has been formed is separated from the main surface of the semiconductor substrate. Further, the semiconductor base layer on which the at least one device structure has been formed and separated from the main, surface of the semiconductor substrate is attached onto a main surface of a diamond substrate. Finally, the semiconductor base layer thus attached is fixed to the main surface of the diamond substrate. The semiconductor base layer is preferably formed over the main surface of the semiconductor substrate through an intervening sacrificial layer. Also, the semiconductor base layer is separated from the main surface of the semiconductor substrate by removing the sacrificial layer.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: October 8, 2002
    Assignee: NEC Corporation
    Inventor: Norihiko Samoto
  • Publication number: 20020025664
    Abstract: There is formed, so as to cover the upper structure (a gold-containing, low-resistance metal layer) of a T- or Y-shaped gate, a thin film (e.g. a thin TiN film) which is not reactive to the low-resistance metal layer, which is resistant to an etching solution to be applied in a later wet etching step, and which has good adhesivity to a resist to be coated in a later step, to prevent the direct contact of the low-resistance metal layer with the resist. In this state, supports are formed.
    Type: Application
    Filed: August 24, 2001
    Publication date: February 28, 2002
    Applicant: NEC Corporation
    Inventors: Akio Wakejima, Norihiko Samoto, Walter Contrata
  • Patent number: 6090523
    Abstract: An antireflection film includes a base resin and an additive resin, the additive resin having a dry etching rate higher than that of the base resin. A photoresist pattern is formed and the antireflection film is selectively etched using the photoresist pattern as a mask. The molecular weight and weight percent of the additive resin are selected to provide an etching rate for the antireflection film that permits selective removal of the antireflection film while leaving an effective amount of the photoresist.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: July 18, 2000
    Assignee: NEC Corporation
    Inventors: Norihiko Samoto, Haruo Iwasaki, Atsushi Nishizawa, Tsuyoshi Yoshii, Hiroshi Yoshino
  • Patent number: 5583063
    Abstract: A method of forming a T-shaped, cross-sectional pattern that enables upper and lower parts of the T-shaped patten using in first and second resist films layers independent of an existence of a mixing layer. A first resist film that is not sensitive to UV light is formed on or over a substrate and a first window is formed on or over a substrate and a first window is formed in the first resist film. The first window corresponds to the lower part of the T-shaped pattern. Next, a second resist film is formed on the first resist film to cover the first window. The second resist film is exposed to UV light to form a given image in the second resist film and is developed to form a second window in the second resist film. The second window corresponds to the upper part of the pattern.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: December 10, 1996
    Assignee: NEC Corporation
    Inventor: Norihiko Samoto
  • Patent number: 5498769
    Abstract: A method for thermally treating a resist film for forming an undercut pattern therein includes forming internally in the resist film a distribution of temperatures falling from the surface of the resist film toward an interface between the resist film and the substrate. The heat source and the resist film are brought to a state wherein they are located closely to each other while maintaining an untouching space. This state is kept for a predetermined time period, and the resist film and the heat source are caused to be spaced away from each other to a location wherein the resist film is free from being influenced by the heat source. Only by having a desired pattern exposed and subsequently developed, it is possible to form the resist pattern in an undercut form in the resist film which is useful as an underlying pattern in a lift-off process.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: March 12, 1996
    Assignee: NEC Corporation
    Inventor: Norihiko Samoto