Abstract: An etching method for detecting crystal defects, the method includes providing a substrate with an etchant containing hydrogen fluoride, nitric acid, hydrogen chloride, and water. A concave portion on a part having a crystal defect of the substrate is formed by the etchant. The concave portion is examined by a microscope to locate a position of the crystal defect.

Abstract: An etching method for detecting crystal defects, the method includes providing a substrate with an etchant containing hydrogen fluoride, nitric acid, hydrogen chloride, and water. A concave portion on a part having a crystal defect of the substrate is formed by the etchant. The concave portion is examined by a microscope to locate a position of the crystal defect.

Abstract: A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Abstract: A method of inspecting a semiconductor wafer, comprises removing a device structure film on the semiconductor wafer with a chemical solution to expose a crystal surface of the semiconductor wafer; coating a protected area, which is a part of the crystal surface of the semiconductor wafer, with a mask material for protecting the crystal surface of the semiconductor wafer; etching the semiconductor wafer selectively, thereby making a crystal defect in a non-protected area, which is a part of the crystal surface of the semiconductor wafer that is not coated with the mask material, appear after the crystal surface is coated with the mask material; removing the mask material after the selective etching; carrying out quantitative measurement of the protected area and the non-protected area using an optical defect inspection apparatus or a beam-type defect inspection apparatus; and calculating the number of crystal defects of the semiconductor wafer base on the result of the measurement.

Abstract: A treatment method of a semiconductor wafer includes treating the semiconductor wafer in a first solution having at least one kind of an oxidative acid and an oxidizing agent and treating the semiconductor wafer in a second solution having at least one of HF and NH4F.

Abstract: A control system for a manufacturing process includes an inspection tool inspecting a dislocation image in semiconductor substrate processed by manufacturing processes; an inspection information input module configured to acquire the inspected dislocation image; a process condition input module acquiring process conditions of the manufacturing processes; a structure information input module acquiring structure of the semiconductor substrate processed by target manufacturing process; a stress analysis module calculating stresses at nodes provided in the structure, based on target process condition and the structure; an origin setting module providing origins at positions where stress concentration having stress value not less than reference value is predicted; a dislocation dynamics analysis module calculating dislocation pattern in stress field for each position of the origins; and a dislocation pattern comparison module comparing the dislocation pattern with the inspected dislocation image so as to determine

Abstract: A method of inspecting a semiconductor wafer, comprises removing a device structure film on the semiconductor wafer with a chemical solution to expose a crystal surface of the semiconductor wafer; coating a protected area, which is a part of the crystal surface of the semiconductor wafer, with a mask material for protecting the crystal surface of the semiconductor wafer; etching the semiconductor wafer selectively, thereby making a crystal defect in a non-protected area, which is a part of the crystal surface of the semiconductor wafer that is not coated with the mask material, appear after the crystal surface is coated with the mask material; removing the mask material after the selective etching; carrying out quantitative measurement of the protected area and the non-protected area using an optical defect inspection apparatus or a beam-type defect inspection apparatus; and calculating the number of crystal defects of the semiconductor wafer base on the result of the measurement.

Abstract: A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Abstract: A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Abstract: A method for evaluating an SOI layer on an insulating film disposed on a base substrate so as to construct an SOI substrate, includes: measuring a first diffraction intensity distribution of an X-ray beam corresponding to an incident angle formed with the X-ray beam and a front surface of the SOI substrate by irradiating the X-ray beam onto the base substrate; measuring a second diffraction intensity distribution of the X-ray beam for the incident angle formed with the X-ray beam and the front surface of the SOI substrate by irradiating the X-ray beam onto the SOI layer; determining an evaluation diffraction peak corresponding to the SOI layer from the first and the second diffraction intensity distribution; and observing an X-ray topograph by irradiating the X-ray beam on the SOI layer with a second incident beam angle of the evaluation diffraction peak.

Abstract: A control system for a manufacturing process includes an inspection tool inspecting a dislocation image in semiconductor substrate processed by manufacturing processes; an inspection information input module configured to acquire the inspected dislocation image; a process condition input module acquiring process conditions of the manufacturing processes; a structure information input module acquiring structure of the semiconductor substrate processed by target manufacturing process; a stress analysis module calculating stresses at nodes provided in the structure, based on target process condition and the structure; an origin setting module providing origins at positions where stress concentration having stress value not less than reference value is predicted; a dislocation dynamics analysis module calculating dislocation pattern in stress field for each position of the origins; and a dislocation pattern comparison module comparing the dislocation pattern with the inspected dislocation image so as to determine

Abstract: A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350° C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Abstract: A treatment method of a semiconductor wafer includes treating the semiconductor wafer in a first solution having at least one kind of an oxidative acid and an oxidizing agent and treating the semiconductor wafer in a second solution having at least one of HF and NH4F

Abstract: A method for evaluating an SOI layer on an insulating film disposed on a base substrate so as to construct an SOI substrate, includes: measuring a first diffraction intensity distribution of an X-ray beam corresponding to an incident angle formed with the X-ray beam and a front surface of the SOI substrate by irradiating the X-ray beam onto the base substrate; measuring a second diffraction intensity distribution of the X-ray beam for the incident angle formed with the X-ray beam and the front surface of the SOI substrate by irradiating the X-ray beam onto the SOI layer; determining an evaluation diffraction peak corresponding to the SOI layer from the first and the second diffraction intensity distribution; and observing an X-ray topograph by irradiating the X-ray beam on the SOI layer with a second incident beam angle of the evaluation diffraction peak.

Abstract: A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Abstract: A defect-position identifying method for a semiconductor substrate comprises the steps of: forming at least three reference points on a semiconductor substrate; detecting the reference points and a defect on the semiconductor substrate by means of a first evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points and the defect in a system of coordinates of the first evaluating system; detecting the reference points on the semiconductor substrate by means of a second evaluating system, which is provided for evaluating the defect on the semiconductor substrate, to measure coordinate values of the reference points in a system of coordinates of the second evaluating system; determining an affine transformation for transforming the system of coordinates of the first evaluating system to the system of coordinates of the second evaluating system on the basis of the coordinate values of each of the reference points in the first

Abstract: The average density and scattered light intensity or the average density and average size of void defects contained in a surface region in a predetermined depth of a semiconductor wafer sample are measured. An ingot whose a semiconductor wafer sample satisfies D.times.Is.ltoreq.a predetermined value between the measured average density D and scattered light intensity Is or satisfies D.times.L.sup.3 .ltoreq.fixed value between the measured average density D and average size L is extracted and wafers cut from the ingot are annealed. The semiconductor wafers having few residual defects in a surface region wherein devices are to be formed can be obtained.

Abstract: A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350.degree. C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Abstract: In an extremely thin hetero-epitaxial growth film less than 1 .mu.m, the thin film can be grown at high precision by controlling the growth conditions. The method of growing a thin film on a semiconductor substrate comprises the steps of: forming a semiconductor thin film on a surface of a semiconductor substrate; allowing X-rays to be incident upon the thin film now being grown; measuring fluorescent X-rays emitted from the thin film now being grown in accompany with the application of the X-rays; and controlling growth conditions of the thin film on the basis of the measured values.

Abstract: Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.