Patents by Inventor Norihiko Ui

Norihiko Ui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8581665
    Abstract: A Doherty amplifier includes: an input distributor; a coupler; a plurality of Doherty circuit connected between the input distributor and the coupler; wherein each of Doherty circuits has a carrier amplifier, a peaking amplifier, a distributor distributing a input signal to the carrier amplifier and the peaking amplifier, and a combiner that transforms an output impedance of the carrier amplifier and combines outputs of the carrier amplifier and the peaking amplifier.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: November 12, 2013
    Assignee: Sumitomi Electric Device Innovations, Inc.
    Inventor: Norihiko Ui
  • Publication number: 20120025915
    Abstract: A Doherty amplifier includes: an input distributor; a coupler; a plurality of Doherty circuit connected between the input distributor and the coupler; wherein each of Doherty circuits has a carrier amplifier, a peaking amplifier, a distributor distributing a input signal to the carrier amplifier and the peaking amplifier, and a combiner that transforms an output impedance of the carrier amplifier and combines outputs of the carrier amplifier and the peaking amplifier.
    Type: Application
    Filed: July 26, 2011
    Publication date: February 2, 2012
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Norihiko Ui
  • Patent number: 7388429
    Abstract: An amplifier circuit includes an amplifier having an amplifying device composed of GaN or a GaN compound semiconductor used for an active region, and a distortion compensation circuit that is connected to the amplifier, has an attenuation characteristic, and has a negative phase distortion.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: June 17, 2008
    Assignee: Eudyna Devices Inc.
    Inventor: Norihiko Ui
  • Patent number: 7157756
    Abstract: A field-effect transistor includes a channel layer that is formed on a predetermined semiconductor layer and has an impurity concentration varying from a low value to a high value, and a source region and a drain region each having a bottom face above the predetermined semiconductor layer.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: January 2, 2007
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Norihiko Ui, Kazutaka Inoue, Kazuo Nambu
  • Publication number: 20060108660
    Abstract: An amplifier circuit includes an amplifier having an amplifying device composed of GaN or a GaN compound semiconductor used for an active region, and a distortion compensation circuit that is connected to the amplifier, has an attenuation characteristic, and has a negative phase distortion.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 25, 2006
    Applicant: EUDYNA DEVICES INC.
    Inventor: Norihiko Ui
  • Publication number: 20040016965
    Abstract: A field-effect transistor includes a channel layer that is formed on a predetermined semiconductor layer and has an impurity concentration varying from a low value to a high value, and a source region and a drain region each having a bottom face above the predetermined semiconductor layer.
    Type: Application
    Filed: July 15, 2003
    Publication date: January 29, 2004
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Norihiko Ui, Kazutaka Inoue, Kazuo Nambu