Patents by Inventor Norihiro Togasaki

Norihiro Togasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8294282
    Abstract: The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: October 23, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidekazu Hayashi, Hiroshi Tomita, Junya Sagara, Shinya Takyu, Norihiro Togasaki, Tetsuya Kurosawa, Yukiko Kitajima
  • Publication number: 20120193784
    Abstract: Provided is a method for joining a bonding wire, the method including wedge-joining a bonding wire which has a core whose main component is a non-noble metal and a noble metal layer covering the core to a bump formed on an electrode of a semiconductor element via the noble metal layer.
    Type: Application
    Filed: January 19, 2012
    Publication date: August 2, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Norihiro Togasaki, Mitsuhiro Nakao, Yosuke Morita
  • Publication number: 20110068480
    Abstract: The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.
    Type: Application
    Filed: March 23, 2010
    Publication date: March 24, 2011
    Inventors: Hidekazu Hayashi, Hiroshi Tomita, Junya Sagara, Shinya Takyu, Norihiro Togasaki, Tetsuya Kurosawa, Yukiko Kitajima
  • Publication number: 20100311224
    Abstract: According to one embodiment, a manufacturing method of a semiconductor device includes forming a plurality of first trenches in a semiconductor substrate, forming an insulating member in the first trenches, removing a part of a portion of the insulating member, forming second trenches in the insulating member, and attaching a protection film. The semiconductor substrate has a first and a second main surface. The insulating member has an upper face located higher than the first main surface. The portion is located higher than the first main surface.
    Type: Application
    Filed: May 18, 2010
    Publication date: December 9, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuya Kurosawa, Junya Sagara, Shinya Takyu, Norihiro Togasaki