Abstract: A voltage detection unit includes a voltage detection terminal having a first location being conductively connected to a detection target, a board-shaped housing having a terminal accommodating recess in which the voltage detection terminal is accommodated, a cover locked to the housing at a first temporary locking position where the first location of the voltage detection terminal accommodated in the terminal accommodating recess is not covered and a final locking position where the first location is covered, and an electric wire conductively connected to a second location of the voltage detection terminal and drawn out toward the outside of the housing. The housing includes a guide portion guiding the cover from the outside toward the first temporary locking position, and a first wall abutting on the cover when the cover is positioned at the first temporary locking position in a moving direction in which the cover is guided.

Abstract: A first board-shaped member includes a conductive plate disposed between a plurality of stacked power storage modules, a battery stack plate including a board-shaped insulating housing having a fitting groove recessed in a side face of the board-shaped insulating housing so as to fit with a side edge of the conductive plate, a sealing material supply groove respectively provided in front and back faces of the insulating housing along an extension direction of the fitting groove, a through hole that communicates with the sealing material supply groove and the fitting groove, and a sealing material pre-filled into the fitting groove and extruded from the fitting groove to the front and back faces of the insulating housing through the through hole and the sealing material supply groove when the side edge of the conductive plate is fitted into the fitting groove.

Abstract: A temperature detection unit includes a board-shaped housing having a board side face provided with a recess configured to be fitted with a side edge of a conductive board disposed between a plurality of stacked power storage modules, and a temperature detection sensor mounted on the housing and configured to measure a temperature of the power storage modules. The housing is provided with a sensor accommodating recess accommodating the temperature detection sensor. A plate end face on one side facing an intersecting direction with a direction that the board side face of the housing faces is provided with an opening configured to allow a temperature wire connected to the temperature detection sensor to extend toward the outside. The sensor accommodating recess extends obliquely to approach the conductive board from one side toward the other side in the intersecting direction.

Abstract: A probe unit is a probe unit used to measure hemoglobin dynamics inside a subject, and the probe unit includes a main body having flexibility, a first probe attached to the main body and having a first face from which a first light emitting portion for irradiating the subject with light is exposed, a second probe attached to the main body to face the first probe and having a second face from which a first light incidence portion for detecting light propagated inside the subject is exposed, a first light shielding member having light shielding properties, containing an elastic material, and attached to the first face to surround an emission axis of the first light emitting portion, and a second light shielding member having light shielding properties, containing an elastic material, and attached to the second face to surround an incidence axis of the first light incidence portion.

Abstract: An object of the present invention is induction of CD4-positive T cells from pluripotent stem cells. This object is achieved by production of CD4-positive T cells by introducing a CD4 gene or a gene product thereof into T cells induced from pluripotent stem cells.

Abstract: A pharmaceutical includes helper T cells induced from pluripotent stem cells. The helper T cells include CD4-positive CD40L-highly expressing T cells, dendritic cells, antigen, and cytotoxic T cells CD8-positive T cells. The pharmaceutical can be administered in a method for treating cancer to a patient having cancer cells expressing an antigen specifically recognized by CD4-positive T cells.

Abstract: A method of producing helper T cells, comprising: (i) culturing T cells, which have been induced from pluripotent stem cells and into which a CD4 gene or a gene product thereof has been introduced, in a medium containing IL-2 and IL-15; and (ii) isolating CD40L-highly expressing T cells from cells obtained in step (i).

Abstract: A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.

Abstract: A method of producing helper T cells, comprising: (i) culturing T cells, which have been induced from pluripotent stem cells and into which a CD4 gene or a gene product thereof has been introduced, in a medium containing IL-2 and IL-15; and (ii) isolating CD40L-highly expressing T cells from cells obtained in step (i).

Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.

Abstract: A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.

Abstract: A technique for accurately detecting a temperature of a sealing surface which is not affected by sealing conditions or the like is provided. A seal bar (1) is a rod-shaped seal bar having a sealing surface (11a) and includes a heater (13) and a temperature sensor (14). The heater (13) is provided in a main body of the seal bar (1) and extends in an extending direction (D1) of the main body (11). The temperature sensor (14) is provided at a position between the sealing surface (11a) and the heater (13) in the main body (11) of the seal bar (1) and is inserted into the main body (11) of the seal bar (1) from an end surface (upper end surface (112) or the like) which intersects a long side of the sealing surface (11a).

Abstract: A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the nMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.

Abstract: A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the AMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.

Abstract: An object of the present invention is induction of CD4-positive T cells from pluripotent stem cells. This object is achieved by production of CD4-positive T cells by introducing a CD4 gene or a gene product thereof into T cells induced from pluripotent stem cells.

Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.

Abstract: A technique for accurately detecting a temperature of a sealing surface which is not affected by sealing conditions or the like is provided. A seal bar (1) is a rod-shaped seal bar having a sealing surface (11a) and includes a heater (13) and a temperature sensor (14). The heater (13) is provided in a main body of the seal bar (1) and extends in an extending direction (D1) of the main body (11). The temperature sensor (14) is provided at a position between the sealing surface (11a) and the heater (13) in the main body (11) of the seal bar (1) and is inserted into the main body (11) of the seal bar (1) from an end surface (upper end surface (112) or the like) which intersects a long side of the sealing surface (11a).

Abstract: The reference circuit includes a first switch element that is connected to the first node at a first end of a current path thereof. The reference circuit includes a first capacitive element that is connected to a second end of the current path of the first switch element at a first end thereof and to a fixed potential at a second end thereof. The reference circuit includes an output circuit that outputs a third voltage that is based on a second voltage at the first end of the first capacitive element. The reference circuit includes a comparator that compares a fourth voltage correlated with the second voltage and a fifth voltage and outputs a comparison result signal in accordance with a result of the comparison. The reference circuit includes a controlling circuit that controls operation of the voltage generating circuit and the first switch element.

Abstract: The step-down regulator includes a first error amplifying circuit that receives a first reference voltage and the first voltage and supplies a first control signal to a control terminal of the first transistor so that the first reference voltage and the first voltage are equal to each other. The step-down regulator includes a second error amplifying circuit that receives a voltage at the second end of the current controlling circuit and a second reference voltage and supplies a second control signal to the current controlling circuit so that the voltage at the second end of the current controlling circuit and the second reference voltage are equal to each other. The step-down regulator includes a diode that is connected to the second end of the current controlling circuit at an anode thereof and to the second potential at a cathode thereof.

Abstract: The step-down regulator includes a first error amplifying circuit that receives a first reference voltage and the first voltage and supplies a first control signal to a control terminal of the first transistor so that the first reference voltage and the first voltage are equal to each other. The step-down regulator includes a second error amplifying circuit that receives a voltage at the second end of the current controlling circuit and a second reference voltage and supplies a second control signal to the current controlling circuit so that the voltage at the second end of the current controlling circuit and the second reference voltage are equal to each other. The step-down regulator includes a diode that is connected to the second end of the current controlling circuit at an anode thereof and to the second potential at a cathode thereof.