Patents by Inventor Norihiro Ueda

Norihiro Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200129551
    Abstract: A method of producing helper T cells, comprising: (i) culturing T cells, which have been induced from pluripotent stem cells and into which a CD4 gene or a gene product thereof has been introduced, in a medium containing IL-2 and IL-15; and (ii) isolating CD40L-highly expressing T cells from cells obtained in step (i).
    Type: Application
    Filed: March 13, 2018
    Publication date: April 30, 2020
    Inventors: Shin KANEKO, Norihiro UEDA, Yasushi UEMURA, Kyoko FUKUDA
  • Patent number: 10601411
    Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.
    Type: Grant
    Filed: September 3, 2017
    Date of Patent: March 24, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Seiichi Goya, Hideaki Uchida, Norihiro Ueda
  • Publication number: 20200091885
    Abstract: A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.
    Type: Application
    Filed: March 5, 2019
    Publication date: March 19, 2020
    Inventor: Norihiro Ueda
  • Publication number: 20200044139
    Abstract: There is provided a piezoelectric transformer including a first output terminal, a first piezoelectric element connected to the first output terminal, a second output terminal, a second piezoelectric element connected to the second output terminal, an input terminal, and a third piezoelectric element connected to the input terminal, wherein each of the first and second output terminals is formed to be individually connectable to a corresponding external load and outputs a voltage at a different frequency.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 6, 2020
    Inventors: Miki Ueda, Takanori Matsuda, Makoto Kubota, Akira Uebayashi, Norihiro Suzuki
  • Patent number: 10442139
    Abstract: A technique for accurately detecting a temperature of a sealing surface which is not affected by sealing conditions or the like is provided. A seal bar (1) is a rod-shaped seal bar having a sealing surface (11a) and includes a heater (13) and a temperature sensor (14). The heater (13) is provided in a main body of the seal bar (1) and extends in an extending direction (D1) of the main body (11). The temperature sensor (14) is provided at a position between the sealing surface (11a) and the heater (13) in the main body (11) of the seal bar (1) and is inserted into the main body (11) of the seal bar (1) from an end surface (upper end surface (112) or the like) which intersects a long side of the sealing surface (11a).
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: October 15, 2019
    Assignee: OMRON Corporation
    Inventors: Hironori Ogawa, Norihiro Ueda, Yuki Tarumoto, Takaaki Yamada, Masahiro Ozaki, Morihisa Ohta, Akira Takaishi, Hiroyuki Togawa, Atsushi Mukai
  • Patent number: 10355648
    Abstract: A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the nMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: July 16, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Norihiro Ueda
  • Publication number: 20190089313
    Abstract: A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the AMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.
    Type: Application
    Filed: March 2, 2018
    Publication date: March 21, 2019
    Inventor: Norihiro Ueda
  • Publication number: 20180298337
    Abstract: An object of the present invention is induction of CD4-positive T cells from pluripotent stem cells. This object is achieved by production of CD4-positive T cells by introducing a CD4 gene or a gene product thereof into T cells induced from pluripotent stem cells.
    Type: Application
    Filed: October 14, 2016
    Publication date: October 18, 2018
    Inventors: Shin KANEKO, Norihiro UEDA, Yasushi UEMURA
  • Publication number: 20180226960
    Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.
    Type: Application
    Filed: September 3, 2017
    Publication date: August 9, 2018
    Inventors: Seiichi GOYA, Hideaki UCHIDA, Norihiro UEDA
  • Publication number: 20180178456
    Abstract: A technique for accurately detecting a temperature of a sealing surface which is not affected by sealing conditions or the like is provided. A seal bar (1) is a rod-shaped seal bar having a sealing surface (11a) and includes a heater (13) and a temperature sensor (14). The heater (13) is provided in a main body of the seal bar (1) and extends in an extending direction (D1) of the main body (11). The temperature sensor (14) is provided at a position between the sealing surface (11a) and the heater (13) in the main body (11) of the seal bar (1) and is inserted into the main body (11) of the seal bar (1) from an end surface (upper end surface (112) or the like) which intersects a long side of the sealing surface (11a).
    Type: Application
    Filed: October 5, 2017
    Publication date: June 28, 2018
    Applicant: OMRON Corporation
    Inventors: Hironori OGAWA, Norihiro UEDA, Yuki TARUMOTO, Takaaki YAMADA, Masahiro OZAKI, Morihisa OHTA, Akira TAKAISHI, Hiroyuki TOGAWA, Atsushi MUKAI
  • Publication number: 20160170430
    Abstract: The reference circuit includes a first switch element that is connected to the first node at a first end of a current path thereof. The reference circuit includes a first capacitive element that is connected to a second end of the current path of the first switch element at a first end thereof and to a fixed potential at a second end thereof. The reference circuit includes an output circuit that outputs a third voltage that is based on a second voltage at the first end of the first capacitive element. The reference circuit includes a comparator that compares a fourth voltage correlated with the second voltage and a fifth voltage and outputs a comparison result signal in accordance with a result of the comparison. The reference circuit includes a controlling circuit that controls operation of the voltage generating circuit and the first switch element.
    Type: Application
    Filed: September 9, 2015
    Publication date: June 16, 2016
    Inventor: Norihiro Ueda
  • Patent number: 9152156
    Abstract: The step-down regulator includes a first error amplifying circuit that receives a first reference voltage and the first voltage and supplies a first control signal to a control terminal of the first transistor so that the first reference voltage and the first voltage are equal to each other. The step-down regulator includes a second error amplifying circuit that receives a voltage at the second end of the current controlling circuit and a second reference voltage and supplies a second control signal to the current controlling circuit so that the voltage at the second end of the current controlling circuit and the second reference voltage are equal to each other. The step-down regulator includes a diode that is connected to the second end of the current controlling circuit at an anode thereof and to the second potential at a cathode thereof.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: October 6, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Norihiro Ueda
  • Publication number: 20140232363
    Abstract: The step-down regulator includes a first error amplifying circuit that receives a first reference voltage and the first voltage and supplies a first control signal to a control terminal of the first transistor so that the first reference voltage and the first voltage are equal to each other. The step-down regulator includes a second error amplifying circuit that receives a voltage at the second end of the current controlling circuit and a second reference voltage and supplies a second control signal to the current controlling circuit so that the voltage at the second end of the current controlling circuit and the second reference voltage are equal to each other. The step-down regulator includes a diode that is connected to the second end of the current controlling circuit at an anode thereof and to the second potential at a cathode thereof.
    Type: Application
    Filed: May 23, 2013
    Publication date: August 21, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Norihiro UEDA
  • Publication number: 20130059855
    Abstract: Provided are crystals of compound A which have properties suitable for industrial production. MEANS FOR SOLVING As the results of intensive studies to provide crystals of compound A having an inhibitory activity on the kinase activity of an EML4-ALK fusion protein and a mutant EGFR protein, crystals of compound A were found. Moreover, it was found that A04-type crystal of compound A, from among the aforesaid crystals of compound A, unexpectedly have preferred properties as a drug substance.
    Type: Application
    Filed: May 16, 2011
    Publication date: March 7, 2013
    Applicant: ASTELLAS PHARMA INC.
    Inventors: Itsuro Shimada, Yutaka Hirakura, Kouji Yamazaki, Kazuhiro Takeguchi, Norihiro Ueda
  • Patent number: 7999090
    Abstract: The present invention provides isolated DNA encoding a GWT1 protein having activity to confer resistance of a fungus against a compound of formula Ia, and wherein a defect of a function of the GWT1 protein leads to a decrease in the amount of a glycosylphosphatidylinositol (GPI)-anchored protein in the cell wall of a fungus.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: August 16, 2011
    Assignee: Eisai Co., Ltd
    Inventors: Kappei Tsukahara, Katsura Hata, Koji Sagane, Kazutaka Nakamoto, Mamiko Tsuchiya, Naoaki Watanabe, Fuminori Ohba, Itaru Tsukada, Norihiro Ueda, Keigo Tanaka, Junko Kai
  • Publication number: 20110195999
    Abstract: The present invention provides an antifungal agent represented by the formula: wherein A1 represents a 3-pyridyl group which may have a substituent, a quinolyl group which may have a substituent, or the like; X1 represents a group represented by the formula —NH—C(?O)—, a group represented by the formula —C(?O)—NH—, or the like; E represents a furyl group, a thienyl group, a pyrrolyl group, a phenyl group, a pyridyl group, a tetrazolyl group, a thiazolyl group or a pyrazolyl group; with the proviso that A1 may have 1 to 3 substituents, and E has one or two substituents.
    Type: Application
    Filed: March 14, 2011
    Publication date: August 11, 2011
    Inventors: Kazutaka NAKAMOTO, Itaru Tsukada, Keigo Tanaka, Masayuki Matsukura, Toru Haneda, Satoshi Inoue, Norihiro Ueda, Shinya Abe, Katsura Hata, Naoaki Watanabe
  • Patent number: 7932272
    Abstract: The present invention provides an antifungal agent represented by the formula: [wherein A1 represents a 3-pyridyl group which may have a substituent, a quinolyl group which may have a substituent, or the like; X1 represents a group represented by the formula —NH—C(?O)—, a group represented by the formula —C(?O)—NH—, or the like; E represents a furyl group, a thienyl group, a pyrrolyl group, a phenyl group, a pyridyl group, a tetrazolyl group, a thiazolyl group or a pyrazolyl group; with the proviso that A1 may have 1 to 3 substituents, and E has one or two substituents].
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: April 26, 2011
    Assignee: Eisai R&D Management Co., Ltd.
    Inventors: Kazutaka Nakamoto, Itaru Tsukada, Keigo Tanaka, Masayuki Matsukura, Toru Haneda, Satoshi Inoue, Norihiro Ueda, Shinya Abe, Katsura Hata, Naoaki Watanabe
  • Patent number: 7928209
    Abstract: A reporter system reflecting the transport process that transports GPI-anchored proteins to the cell wall was constructed and compounds inhibiting this process were discovered. Further, fungal genes conferring resistance to the above compounds were identified and methods of screening for compounds that inhibit the activity of the proteins encoded by these genes were developed. These genes encode proteins participating in fungal cell wall synthesis. Therefore, through the novel compounds, the present invention showed that antifungal agents having a novel mechanism, i.e. inhibiting the process that transports GPI-anchored proteins to the cell wall, could be achieved.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: April 19, 2011
    Assignee: Eisai R & D Management Co. Ltd.
    Inventors: Kappei Tsukahara, Katsura Hata, Koji Sagane, Kazutaka Nakamoto, Mamiko Tsuchiya, Naoaki Watanabe, Fuminori Ohba, Itaru Tsukada, Norihiro Ueda, Keigo Tanaka, Junko Kai
  • Patent number: 7910712
    Abstract: The present invention provides isolated DNA encoding a GWT1 protein having activity to confer resistance of a fungus against a compound of formula Ia, and wherein a defect of a function of the GWT1 protein leads to a decrease in the amount of a glycosylphosphatidylinositol (GPI)-anchored protein in the cell wall of a fungus.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: March 22, 2011
    Assignee: Eisai R&D Management Co., Ltd
    Inventors: Kappei Tsukahara, Katsura Hata, Koji Sagane, Kazutaka Nakamoto, Mamiko Tsuchiya, Naoaki Watanabe, Fuminori Ohba, Itaru Tsukada, Norihiro Ueda, Keigo Tanaka, Junko Kai
  • Patent number: 7897387
    Abstract: A reporter system reflecting the transport process that transports GPI-anchored proteins to the cell wall was constructed and compounds inhibiting this process were discovered. Further, genes conferring resistance to the above compounds were identified and methods of screening for compounds that inhibit the activity of the proteins encoded by these genes were developed. Therefore, through the novel compounds, the present invention showed that antifungal agents having a novel mechanism, i.e. inhibiting the process that transports GPI-anchored proteins to the cell wall, could be achieved.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 1, 2011
    Assignee: Eisai R&D Management Co., Ltd.
    Inventors: Kappei Tsukahara, Katsura Hata, Koji Sagane, Kazutaka Nakamoto, Mamiko Tsuchiya, Naoaki Watanabe, Fuminori Ohba, Itaru Tsukada, Norihiro Ueda, Keigo Tanaka, Junko Kai