Abstract: Disclosed is a semiconductor device provided with: lower-layer wiring formed on a substrate, an interlayer insulating film covering the lower-layer wiring, and a first upper-layer wiring line (18b) and a second upper-layer wiring line (18c) arranged on the interlayer insulating film and intersecting with the lower-layer wiring, and a level-difference adjustment protrusion is provided between the first upper-layer wiring line (18b) and the second upper-layer wiring line (18c) adjacent to a side section of the lower-layer wiring.

Abstract: A semiconductor device includes: an emitter electrode formed of a silicide film, and provided on a semiconductor layer; an insulating film provided on the emitter electrode; and an electrode pad made of Al, and provided on the insulating film.

Abstract: Disclosed is a semiconductor device which includes a substrate 11, a thin film transistor 20 having a first semiconductor layer 16A that is supported by the substrate 11, a thin film diode 30 having a second semiconductor layer 16B that is supported by the substrate 11, and a metal layer 12 that is formed between the substrate 11 and the second semiconductor layer 16B. The first semiconductor layer 16A is a laterally grown crystalline semiconductor film, and the second semiconductor layer 16B is a crystalline semiconductor film that contains fine crystal grains. The average surface roughness of the second semiconductor layer 16B is higher than the average surface roughness of the first semiconductor layer 16A. Consequently, the optical sensitivity of the TFD is improved and the reliability of the TFT is improved, as compared with those in the conventional semiconductor devices.

Abstract: Disclosed is a semiconductor device provided with: lower-layer wiring formed on a substrate, an interlayer insulating film covering the lower-layer wiring, and a first upper-layer wiring line (18b) and a second upper-layer wiring line (18c) arranged on the interlayer insulating film and intersecting with the lower-layer wiring, and a level-difference adjustment protrusion is provided between the first upper-layer wiring line (18b) and the second upper-layer wiring line (18c) adjacent to a side section of the lower-layer wiring.

Abstract: A semiconductor device includes: an emitter electrode formed of a silicide film, and provided on a semiconductor layer; an insulating film provided on the emitter electrode; and an electrode pad made of Al, and provided on the insulating film.

Abstract: Disclosed is a semiconductor device which includes a substrate 11, a thin film transistor 20 having a first semiconductor layer 16A that is supported by the substrate 11, a thin film diode 30 having a second semiconductor layer 16B that is supported by the substrate 11, and a metal layer 12 that is formed between the substrate 11 and the second semiconductor layer 16B. The first semiconductor layer 16A is a laterally grown crystalline semiconductor film, and the second semiconductor layer 16B is a crystalline semiconductor film that contains fine crystal grains. The average surface roughness of the second semiconductor layer 16B is higher than the average surface roughness of the first semiconductor layer 16A. Consequently, the optical sensitivity of the TFD is improved and the reliability of the TFT is improved, as compared with those in the conventional semiconductor devices.

Abstract: A semiconductor chip and connection ends of corresponding external electrode terminals are encapsulated with a glass based sealing material, and the semiconductor chip includes a wide gap semiconductor element, and the electrodes of the semiconductor chip are connected to the end portions of the external electrode terminals by a silver based brazing member and/or pressure contact.

Abstract: A semiconductor chip and connection ends of corresponding external electrode terminals are encapsulated with a glass based sealing material, and the semiconductor chip includes a wide gap semiconductor element, and the electrodes of the semiconductor chip are connected to the end portions of the external electrode terminals by a silver based brazing member and/or pressure contact.

Abstract: A semiconductor wafer and a semiconductor device with more chips are obtained. The semiconductor wafer includes a plurality of dicing lines (DXa, DXb, DYa, DYb) extending in the lateral direction (X) and in the longitudinal direction (Y) with an interval (L1) therebetween, and a semiconductor element forming region (CR1) with a semiconductor element, sectioned by the dicing lines (DXa, DXb, DYa, DYb). The dicing lines both in the lateral direction (X) and in the longitudinal direction (Y) have alternate widths (La, Lb), one of which (Lb) is larger than the other (La).

Abstract: A process for manufacturing an active element array substrate, such as for a display panel in a liquid crystal display device. The process comprises exposing photosensitive resin to an irradiation light from the rear face of the substrate and to another irradiation light applied from the front face of the substrate. The irradiation light from the front face of the substrate exposes a region encompassing substantially all of the pixel electrode extending from over a portion of the drain electrode to near the source and gate electrodes. This enables selective exposure of the photosensitive resin to the light from the front face even if scratches or dust exist on the rear face of the substrate during exposure to the light from the rear face, thus increasing the manufacturing yield of such active element array substrates.