Abstract: A voltage converting circuit receiving an input voltage and an increased voltage and providing an output voltage higher than the input voltage at an output terminal, comprises a first pair of gate devices serially connected between the input voltage and a ground, a second pair of gate devices serially connected between the input voltage and the output terminal, a first capacitor connected between a node between the first pair of gate devices and a node between the second pair of gate devices for boosting the output voltage, a second capacitor connected between the output terminal and the ground for smoothing the output voltage, a control circuit for controlling said pairs of gate devices, and a pair of drivers for driving the second pair of gate devices respectively under the control of the control circuit. The pair of drivers are connected so as to operate between the increased voltage and the input voltage.

Abstract: A voice coil motor driving circuit 10 with retracting function used in a disk drive unit for driving a read/write head by means of a voice coil motor VCM, comprising a voltage up-converter 12; a voice coil motor control circuit 16 for driving the voice coil motor during normal operation; a retract power source Vrr for supplying a retract current to the voice coil motor during head retract action; a retract control circuit 24 for allowing the retract current from the retract power source to the voice coil motor in response to a retract signal. The driving circuit also includes a capacitor C for providing an uninterrupted supply of voltage to the retract control circuit 24 during head retract action.

Abstract: A voltage converter for stably converting, even a low input voltage, to a predetermined output level is provided. The output of cell 20 is increased by first and second step-up circuits 21 and 22, and then smoothed by smoothing circuit 31. The output is converted by the first step-up circuit from the start of voltage conversion until a predetermined output voltage, and then converted by the second step-up converter thereafter. The output voltage of smoothing circuit 31 is compared against a first reference voltage by first comparator circuit 35, the output of which activates the integral circuit in second comparator circuit 37. The charge voltage of the integral circuit is compared to a sawtooth wave STW generated by oscillator circuit 43 to derive a signal for forcefully shutting down MOS transistor 29 in the second step-up circuit.

Abstract: A DC/DC voltage converting device is obtained for boosting a DC power supply voltage to provide a higher output voltage, comprising soft start circuit 20 for gradually increasing the turning-on duration of transistor 34 in boosting circuit 30; pulse width control circuit 60 for providing a modulated pulse signal P2 to control the boosted voltage. The device further comprises boosting circuit 30 including an inductor 32, diode 36 and transistor 34. Boosting circuit 30 provides a predetermined boosted voltage higher than the power supply voltage by alternately turning on and off transistor 34. The turning-on duration of transistor 34 is gradually increased during the initial operation period by soft start circuit 20, and is controlled by modulated pulse signal P2 during a stable operation period. The device further comprises gate circuit 40 having diode 46 and transistor 44, and step up circuit 70.

Abstract: A fail safe level shifter assures that, when an input signal voltage level falls below a given threshold voltage, the output is either a constant high or no signal at all. Additionally, a range of digital high signals having a voltage less than the given threshold voltage may be shifted by the fail safe level shifter. The fail safe level shifter expands the width of an N-MOS channel of conventional level shifters by placing two MOS switches in parallel. The resultant resistance allows the fail safe level shifter to register those high signals which are below the given threshold voltage. One-half of the level shifter has a N-MOS channel about one-half the width of a N-MOS channel in the other half of the level shifter. Therefore, the narrower half is unable to fully activate given the low input signals received. The fail safe level shifter thus assures that the output will be a constant high.