Patents by Inventor Noriho Terasawa

Noriho Terasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9842480
    Abstract: An alarm processing circuit includes a plurality of abnormality detection circuits for detecting different abnormalities and outputting alarm signals respectively; a signal conversion circuit for converting the alarm signals outputted from the plurality of abnormality detection circuits into time signals with time widths corresponding to types of the abnormalities respectively; and a determination circuit for determining the types of the abnormalities respectively based on the time widths of the time signals outputted from the signal conversion circuit.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: December 12, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Noriho Terasawa, Yasuyuki Momose
  • Patent number: 9768763
    Abstract: An IGBT provided on the high voltage side uses the sensing function of the IGBT to detect a current and prevents the IGBT from breaking due to an overcurrent through a gate drive unit when the current detected by the short-circuit protection unit is determined to be an overcurrent. When detecting an overcurrent, the short-circuit protection unit outputs an alarm signal to a composition unit. Also, it detects the temperature of the power semiconductor module by using a temperature detection element, converts the detected temperature into a digital signal in the temperature information generating unit, and outputs the digitized temperature information to the composition unit. The composition unit composites the temperature information and the alarm signal and one resultant composite output is transmitted to a control unit on the low voltage side.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: September 19, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Noriho Terasawa, Yasuyuki Momose
  • Patent number: 9653379
    Abstract: A cooler for cooling a semiconductor module includes a top plate; a jacket having a side plate and a bottom plate and firmly fixed to the top plate; a refrigerant inflow port through which a refrigerant flows into a space surrounded by the top plate and jacket; a refrigerant outflow port through which the refrigerant flows out from the space; a plurality of fins firmly fixed to the top plate and disposed separately on each of the left and right relative to a main refrigerant path in the jacket to be inclined toward the inflow side of the main refrigerant path; heat transfer pins disposed on the top plate on the refrigerant inflow sides of the fins; and a curved plate-like bimetal valve having one end connected to each respective heat transfer pin and another free end.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 16, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Koyama, Noriho Terasawa
  • Publication number: 20160190038
    Abstract: A cooler for cooling a semiconductor module includes a top plate; a jacket having a side plate and a bottom plate and firmly fixed to the top plate; a refrigerant inflow port through which a refrigerant flows into a space surrounded by the top plate and jacket; a refrigerant outflow port through which the refrigerant flows out from the space; a plurality of fins firmly fixed to the top plate and disposed separately on each of the left and right relative to a main refrigerant path in the jacket to be inclined toward the inflow side of the main refrigerant path; heat transfer pins disposed on the top plate on the refrigerant inflow sides of the fins; and a curved plate-like bimetal valve having one end connected to each respective heat transfer pin and another free end.
    Type: Application
    Filed: March 10, 2016
    Publication date: June 30, 2016
    Inventors: Takahiro KOYAMA, Noriho TERASAWA
  • Publication number: 20160118974
    Abstract: An IGBT provided on the high voltage side uses the sensing function of the IGBT to detect a current and prevents the IGBT from breaking due to an overcurrent through a gate drive unit when the current detected by the short-circuit protection unit is determined to be an overcurrent. When detecting an overcurrent, the short-circuit protection unit outputs an alarm signal to a composition unit. Also, it detects the temperature of the power semiconductor module by using a temperature detection element, converts the detected temperature into a digital signal in the temperature information generating unit, and outputs the digitized temperature information to the composition unit. The composition unit composites the temperature information and the alarm signal and one resultant composite output is transmitted to a control unit on the low voltage side.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 28, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Noriho TERASAWA, Yasuyuki MOMOSE
  • Publication number: 20160063834
    Abstract: An alarm processing circuit includes a plurality of abnormality detection circuits for detecting different abnormalities and outputting alarm signals respectively; a signal conversion circuit for converting the alarm signals outputted from the plurality of abnormality detection circuits into time signals with time widths corresponding to types of the abnormalities respectively; and a determination circuit for determining the types of the abnormalities respectively based on the time widths of the time signals outputted from the signal conversion circuit.
    Type: Application
    Filed: July 23, 2015
    Publication date: March 3, 2016
    Inventors: Noriho TERASAWA, Yasuyuki MOMOSE
  • Patent number: 9165852
    Abstract: A mounting structure for a printed circuit board, includes a printed circuit board to which a heavy material is fixed; a fixing member fixed to the printed circuit board immediately below the heavy material; and a receiving member fixed to a main body. A bottom portion of the fixing member is disposed in the receiving member, and fixed to the receiving member by a resin adhesive.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: October 20, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Noriho Terasawa, Yasuyuki Momose
  • Publication number: 20140233188
    Abstract: A mounting structure for a printed circuit board, includes a printed circuit board to which a heavy material is fixed; a fixing member fixed to the printed circuit board immediately below the heavy material; and a receiving member fixed to a main body. A bottom portion of the fixing member is disposed in the receiving member, and fixed to the receiving member by a resin adhesive.
    Type: Application
    Filed: September 18, 2012
    Publication date: August 21, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Noriho Terasawa, Yasuyuki Momose
  • Publication number: 20120134181
    Abstract: A primary power supply input can be supplied to each of gate driving units through individual transformers, respectively, from power supply terminals. One end of a primary winding of each of the transformers can be connected to the power supply terminal by power supply lines. In addition, the other end of each of the primary windings can be connected to one another by common connection lines to be further connected to a drain terminal of a MOSFET for controlling a current flowing in each of the primary windings. A gate power supply control circuit, to which an output current detected by an auxiliary winding of the transformer is fed back, can control a duty ratio for the on-off control of the MOSFET.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 31, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Isao AMANO, Noriho TERASAWA
  • Patent number: 6215634
    Abstract: A drive circuit for driving a power device is provided which includes a first ground that provides a current path of drive current that flows when the power device is driven, and a second ground that is used by a protection circuit that monitors an operating state of the power device.
    Type: Grant
    Filed: April 10, 1999
    Date of Patent: April 10, 2001
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 5942797
    Abstract: A power semiconductor module in which a plurality of power semiconductor elements forming a bridge circuit are provided together with control circuits. The module includes a common casing which accommodates a metal base, a main circuit section, and a control circuit section. The main circuit section has a plurality of semiconductor elements of the bridge circuit mounted on a ceramic insulating board which is thermally coupled to the metal base. The main circuit section also supports connecting conductors to which the semiconductor elements are connected. In the control circuit section are mounted control circuits for the semiconductor elements. The control circuits are mounted on a wiring substrate which is formed by wiring conductors on an insulating board. The main circuit section is connected through a bond to the control circuit section. Input and output terminals of the bridge circuit are extended from the connecting conductors of the main circuit section.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: August 24, 1999
    Assignee: Fuji Electric Co. Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 5896286
    Abstract: A power semiconductor module with a bridge circuit is housed in a common case. The module includes a plurality of element chips separated into groups for semiconductor elements, a plurality of drive chips, and a signal processing chip formed as an integrated circuit. Each drive chip is formed as an integrated drive circuit and is connected to each semiconductor element to correspond thereto. Each drive chip operates at a potential corresponding to each semiconductor element. The signal processing chip is connected to the drive chips to be shared commonly by the drive chips. The signal processing chip processes signals associated with the drive chips in such a way that the signals are compatible with the potentials of the drive chips. Cost and performance of the module is improved.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: April 20, 1999
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 5625312
    Abstract: A control circuit for an insulated-gate semiconductor device (IGBT) 1 has a drive circuit 2, which is a series circuit constructed of an npn transistor 3 and a pnp transistor 4, and controls the switching operation of the IGBT 1 in response to an on/off signal 9S from a switching signal source 9. The control circuit includes a switching speed control means 10, a gate potential stabilizing npn transistor 20, and a stable operation extending means 30. The switching speed control means 10 gives predetermined slops to the rise and fall of the on/off signal 9S. The gate potential stabilizing npn transistor 20 is Darlington-connected to the pnp transistor 4 of the drive circuit 2 and has the emitter thereof connected to the source of the IGBT 1. The stable operation extending means 30 generates an on signal to the base of the gate potential stabilizing npn transistor 20 upon sensing a drop in the gate potential of the IGBT 1 to a threshold voltage thereof or less.
    Type: Grant
    Filed: June 28, 1995
    Date of Patent: April 29, 1997
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Hiroyuki Kawakami, Noriho Terasawa
  • Patent number: 5604674
    Abstract: To suppress the increase of the cost and dimensions of an intelligent module which incorporates a control function with the driving circuit device having a bridge circuit for driving inverters etc. The module 70 has a rectangular base plate 30, along the long side of which are aligned power semiconductor elements 10. Chips of control input circuits 20 are displaced along the short side of the base plate 30, and arranged in close proximity to the corresponding semiconductor elements. Input terminals P, N and output terminals U, V, W are arranged on the long side of the base plate 30 along which the semiconductor elements 10 are arranged. Control input terminals Tc are arranged on another long side of the base plate 30. The input and output terminals are connected via conductors 40 with the corresponding semiconductor elements 10. And, the control input terminals Tc are connected via a wiring board 50 with the corresponding control input circuits 20.
    Type: Grant
    Filed: August 7, 1995
    Date of Patent: February 18, 1997
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 5576575
    Abstract: A semiconductor conversion device is disclosed with particular utility in connection with minimizing malfunctions of the device's switching elements. The conversion device according to the present invention has a bridge circuit configuration and consists of a main transistor circuit and a drive-circuit network for controlling the transistor switching operation. The main transistor circuit consists of at least one semiconductor switching element for each of at least one upper-arm circuit and one lower-arm circuit. The drive-circuit network consists of individual component drive circuits associated with the respective semiconductor switching elements. The component drive circuits are mounted on wiring patterns of a foil-like conductor on a printed wiring substrate. The wiring patterns of the individual component drive circuits are configured to minimize the value of the parasitic capacitance formed between the wiring patterns.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: November 19, 1996
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Noriho Terasawa
  • Patent number: 5561393
    Abstract: A control device for controlling a double gate semiconductor device having a second gate electrode for controlling transition from a thyristor operation to a transistor operation, and a first gate electrode for controlling transition from transistor operation to an ON/OFF operation, and for controlling a current passing from a collector electrode to an emitter electrode, includes a first gate control circuit for delaying a turn-off signal to the double gate semiconductor device and applying the turn-off signal to the first gate electrode.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: October 1, 1996
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Ken'ya Sakurai, Masahito Otsuki, Noriho Terasawa, Tadashi Miyasaka, Akira Nishiura, Masaharu Nishiura
  • Patent number: 5459339
    Abstract: A semiconductor device thyristor structure includes a first conductive type collector region, second conductive type and first conductive type base regions, and a second conductive type emitter region. First conductive type regions and second conductive type regions have respective first and second type majority carriers. A first MOSFET injects the second type majority carriers into the second conductive type base region. A second MOSFET is opened and closed independent of the first MOSFET and extracts the first type majority carriers from the first conductive type base region. A third MOSFET has a first gate electrode which is also a gate electrode of the first MOSFET, for extracting the first type majority carriers from the first conductive type base region. First conductive type and second conductive type emitter regions are formed within the first conductive type base region and an emitter voltage can be simultaneously applied to these emitter regions.
    Type: Grant
    Filed: April 29, 1993
    Date of Patent: October 17, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Ken'ya Sakurai, Masahito Otsuki, Noriho Terasawa, Tadashi Miyasaka, Akira Nishiura, Masaharu Nishiura
  • Patent number: D357671
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: April 25, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Noriho Terasawa, Shin Soyano
  • Patent number: D357672
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: April 25, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Noriho Terasawa, Shin Soyano
  • Patent number: D360619
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: July 25, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Noriho Terasawa, Shin Soyano