Patents by Inventor Norikazu Iwagami

Norikazu Iwagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8216950
    Abstract: A semiconductor device includes an operating layer made of a semiconductor and a silicon nitride film formed on the operating layer with the use of a mixed gas that includes mono-silane gas, hydrogen gas, and nitrogen gas, by a plasma CVD apparatus, under a condition that a flow rate of the hydrogen gas is 0.2 percent to 5 percent to an overall flow rate.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Eudyna Devices Inc.
    Inventor: Norikazu Iwagami
  • Patent number: 7821134
    Abstract: A semiconductor device includes a lower pad layer, an insulating layer and an upper pad layer. The lower pad layer is provided on a semiconductor substrate. The insulating layer is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed. The upper pad layer covers over the lower pad layer and the space, extends to an upper face of the insulating layer, and has an area larger than that of the lower pad layer.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: October 26, 2010
    Assignee: Eudyna Devices, Inc.
    Inventors: Norikazu Iwagami, Masaomi Emori
  • Publication number: 20100081241
    Abstract: A semiconductor device includes an operating layer made of a semiconductor and a silicon nitride film formed on the operating layer with the use of a mixed gas that includes mono-silane gas, hydrogen gas, and nitrogen gas, by a plasma CVD apparatus, under a condition that a flow rate of the hydrogen gas is 0.2 percent to 5 percent to an overall flow rate.
    Type: Application
    Filed: December 4, 2009
    Publication date: April 1, 2010
    Applicant: EUDYNA DEVICES INC.
    Inventor: Norikazu IWAGAMI
  • Patent number: 7609070
    Abstract: A manufacturing method of an electronic device includes applying a direct voltage having a first polarity to a capacitor that has an insulating layer including nitrogen and silicon as a capacitor dielectric layer, testing the capacitor to which the direct voltage having the first polarity is applied and determining a nondefective capacitor and a defective capacitor, and applying a direct voltage having a second polarity to the nondefective capacitor. The second polarity is opposite to the first polarity.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: October 27, 2009
    Assignee: Eudyna Devices Inc.
    Inventors: Tomohiro Kagiyama, Yasuhiro Tosaka, Norikazu Iwagami
  • Publication number: 20080074119
    Abstract: A manufacturing method of an electronic device includes applying a direct voltage having a first polarity to a capacitor that has an insulating layer including nitrogen and silicon as a capacitor dielectric layer, testing the capacitor to which the direct voltage having the first polarity is applied and determining a nondefective capacitor and a defective capacitor, and applying a direct voltage having a second polarity to the nondefective capacitor. The second polarity is opposite to the first polarity.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 27, 2008
    Applicant: EUDYNA DEVICES INC.
    Inventors: Tomohiro KAGIYAMA, Yasuhiro TOSAKA, Norikazu IWAGAMI
  • Publication number: 20070200240
    Abstract: A semiconductor device includes a lower pad layer, an insulating layer and an upper pad layer. The lower pad layer is provided on a semiconductor substrate. The insulating layer is away from a surrounding of the lower pad layer so that a space having a recess on a surface between the lower pad layer and the insulating layer is formed. The upper pad layer covers over the lower pad layer and the space, extends to an upper face of the insulating layer, and has an area larger than that of the lower pad layer.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 30, 2007
    Applicant: EUDYNA DEVICES INC.
    Inventors: Norikazu Iwagami, Masaomi Emori
  • Publication number: 20060214270
    Abstract: A semiconductor device includes an operating layer made of a semiconductor and a silicon nitride film formed on the operating layer with the use of a mixed gas that includes mono-silane gas, hydrogen gas, and nitrogen gas, by a plasma CVD apparatus, under a condition that a flow rate of the hydrogen gas is 0.2 percent to 5 percent to an overall flow rate.
    Type: Application
    Filed: March 27, 2006
    Publication date: September 28, 2006
    Applicant: EUDYNA DEVICES INC.
    Inventor: Norikazu Iwagami
  • Patent number: 6504189
    Abstract: A microstrip line includes a first conductor pattern formed on a substrate, a second conductor pattern formed on the first conductor pattern with a width substantially identical with a width of the first conductor pattern, and a third conductor pattern formed on the second conductor pattern with a width smaller than the width of the second conductor pattern.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: January 7, 2003
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Hajime Matsuda, Norikazu Iwagami