Abstract: The capacity of a MOS capacitor is increased. A semiconductor element includes a first semiconductor region, an insulation film, a gate electrode, and a second semiconductor region. The first semiconductor region is arranged on a semiconductor substrate and has a recess on the surface. The insulation film is arranged adjacent to the surface of the first semiconductor region. The gate electrode is arranged adjacent to the insulation film and constitutes a MOS capacitor with the first semiconductor region. The second semiconductor region is arranged adjacent to the first semiconductor region on the semiconductor substrate, formed in the same conductive type as the first semiconductor region, and supplies a carrier to the first semiconductor region when the MOS capacitor is charged and discharged.

Abstract: An imaging device according to the present disclosure includes a pixel array part, in which pixels are disposed, the pixel including a photoelectric conversion element, and an analog-digital converter that converts an analog signal outputted from each of the pixels of the pixel array part into a digital signal, the analog-digital converter including a comparator that compares, with a reference signal, the analog signal outputted from each of the pixels of the pixel array part. A transistor constituting the comparator is a transistor that has a three-dimensional structure including a channel parallel to or perpendicular to a direction of a current flow.

Abstract: A memory cell array of the present disclosure includes a plurality of memory cells 11 arranged in a first direction and a second direction different from the first direction. Each of the memory cells 11 includes a resistance-variable nonvolatile memory element and a selection transistor TR electrically connected to the nonvolatile memory element. The selection transistor TR is formed in an active region 80 provided in a semiconductor layer 60. At least a part of the active region 80 is in contact with an element isolation region 81 provided in the semiconductor layer 60. A surface of the element isolation region 81 is located at a position lower than a surface of the active region 80.

Abstract: The capacity of a MOS capacitor is increased. A semiconductor element includes a first semiconductor region, an insulation film, a gate electrode, and a second semiconductor region. The first semiconductor region is arranged on a semiconductor substrate and has a recess on the surface. The insulation film is arranged adjacent to the surface of the first semiconductor region. The gate electrode is arranged adjacent to the insulation film and constitutes a MOS capacitor with the first semiconductor region. The second semiconductor region is arranged adjacent to the first semiconductor region on the semiconductor substrate, formed in the same conductive type as the first semiconductor region, and supplies a carrier to the first semiconductor region when the MOS capacitor is charged and discharged.