Abstract: A flash memory system includes a memory controller, flash memory, power supply circuit, and control circuit. The power supply circuit includes a power supply terminal fed with external power, a step-up circuit for boosting a first voltage associated with the external power and thereby generating a second voltage higher than the first voltage, a capacitor charged at the second voltage, and a first step-down circuit for lowering the second voltage and thereby generating a third voltage lower than the second voltage, and supplying the generated third voltage to the flash memory as the operating voltage. The control circuit includes a circuit for controlling the active or inactive state of the flash memory based on the level of the third voltage, and a circuit for controlling the active or inactive state of the memory controller based on both the levels of the voltage of the external power and the third voltage.

Abstract: A flash memory system includes a memory controller, flash memory, power supply circuit, and control circuit. The power supply circuit includes a power supply terminal fed with external power, a step-up circuit for boosting a first voltage associated with the external power and thereby generating a second voltage higher than the first voltage, a capacitor charged at the second voltage, and a first step-down circuit for lowering the second voltage and thereby generating a third voltage lower than the second voltage, and supplying the generated third voltage to the flash memory as the operating voltage. The control circuit includes a circuit for controlling the active or inactive state of the flash memory based on the level of the third voltage, and a circuit for controlling the active or inactive state of the memory controller based on both the levels of the voltage of the external power and the third voltage.

Abstract: A power circuit configured to supply an operating voltage to a memory controller configured to control a flash memory and an access to the flash memory, comprises an input side charging unit that is a charging unit configured to be charged by an input voltage that is supplied from the outside, a voltage regulation unit configured to regulate any higher one of the input voltage and a charging voltage of the input side charging unit to be the operating voltage and to output the voltage, an output side charging unit that is a charging unit configured to be charged by the operating voltage, and a discharging unit configured to discharge electricity that has been charged to the output side charging unit in the case in which any higher one of the input voltage and the charging voltage becomes lower than the setting value.

Abstract: A power circuit configured to supply an operating voltage to a memory controller configured to control a flash memory and an access to the flash memory, comprises an input side charging unit that is a charging unit configured to be charged by an input voltage that is supplied from the outside, a voltage regulation unit configured to regulate any higher one of the input voltage and a charging voltage of the input side charging unit to be the operating voltage and to output the voltage, an output side charging unit that is a charging unit configured to be charged by the operating voltage, and a discharging unit configured to discharge electricity that has been charged to the output side charging unit in the case in which any higher one of the input voltage and the charging voltage becomes lower than the setting value.

Abstract: A system controller exchanges data with a memory controller. The system controller includes an interpreting unit, a first instruction data supplying unit, a second instruction data supplying unit, and a controlling unit. The second instruction data supplying unit transfers the first operation instruction data provided from a host system to the memory controller. If the interpreting unit interprets the first operation instruction data as data instructing to begin an operation with the second instruction data supplying unit, the controlling unit shifts to a first mode that halts the first instruction data supplying unit and that begins an operation with the second instruction data supplying unit.

Abstract: A system controller exchanges data with a memory controller. The system controller includes an interpreting unit, a first instruction data supplying unit, a second instruction data supplying unit, and a controlling unit. The second instruction data supplying unit transfers the first operation instruction data provided from a host system to the memory controller. If the interpreting unit interprets the first operation instruction data as data instructing to begin an operation with the second instruction data supplying unit, the controlling unit shifts to a first mode that halts the first instruction data supplying unit and that begins an operation with the second instruction data supplying unit.

Abstract: There is provided a PC card-type wireless LAN card including a metal cover in which lowering of throughput of data transmission is prevented. In a card-type wireless communication device (wireless LAN card) in which a printed board assembly including an antenna, an RF (radio frequency) circuit part (wireless circuit part), a baseband circuit part, and a connector for connection with an information terminal device is fixed to a frame made of synthetic resin, and is covered with a top cover made of metal and a bottom cover except for the portion of the antenna, a shield case made of metal covering the RF circuit part and electrically connected to a ground pattern and the top cover made of metal are brought into contact with each other in a wide range through a metal conductor worked into a shape having elasticity.

Abstract: There is provided a PC card-type wireless LAN card including a metal cover in which lowering of throughput of data transmission is prevented. In a card-type wireless communication device (wireless LAN card) in which a printed board assembly including an antenna, an RF (radio frequency) circuit part (wireless circuit part), a baseband circuit part, and a connector for connection with an information terminal device is fixed to a frame made of synthetic resin, and is covered with a top cover made of metal and a bottom cover except for the portion of the antenna, a shield case made of metal covering the RF circuit part and electrically connected to a ground pattern and the top cover made of metal are brought into contact with each other in a wide range through a metal conductor worked into a shape having elasticity.