Abstract: A semiconductor device subjected to an optical annealing process by radiation light whose principal wavelength is 1.5 ?m or less includes a circuit pattern region formed on a semiconductor substrate, and a dummy pattern region formed separately from the circuit pattern region on the semiconductor substrate. The circuit pattern region has an integrated circuit pattern containing a gate pattern related to a circuit operation. The dummy pattern region has dummy gate patterns that have the same structure as that of a gate pattern used in the integrated circuit pattern and the dummy gate patterns are repeatedly arranged with a pitch 0.4 times or less the principal wavelength.

Abstract: According to the embodiment, a pattern after lithography is derived by using a mask pattern. The mask pattern is corrected by moving a first moving target pattern so that a first evaluation value calculated with respect to this pattern after lithography satisfies a first condition. Next, a pattern after lithography is derived by using the mask pattern after correction. The mask pattern after correction is further corrected by moving a second moving target pattern so that a second evaluation value calculated with respect to this pattern after lithography satisfies a second condition.

Abstract: A semiconductor device subjected to an optical annealing process by radiation light whose principal wavelength is 1.5 ?m or less includes a circuit pattern region formed on a semiconductor substrate, and a dummy pattern region formed separately from the circuit pattern region on the semiconductor substrate. The circuit pattern region has an integrated circuit pattern containing a gate pattern related to a circuit operation. The dummy pattern region has dummy gate patterns that have the same structure as that of a gate pattern used in the integrated circuit pattern and the dummy gate patterns are repeatedly arranged with a pitch 0.4 times or less the principal wavelength.