Patents by Inventor Noriko Ishimaru

Noriko Ishimaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10522076
    Abstract: A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: December 31, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Noriko Ishimaru
  • Patent number: 10467961
    Abstract: A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: November 5, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Noriko Ishimaru
  • Publication number: 20190156742
    Abstract: A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 23, 2019
    Inventors: Shunpei YAMAZAKI, Jun Koyama, Noriko Ishimaru
  • Publication number: 20160365029
    Abstract: A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
    Type: Application
    Filed: June 7, 2016
    Publication date: December 15, 2016
    Inventors: Shunpei YAMAZAKI, Jun Koyama, Noriko Ishimaru
  • Patent number: 9368089
    Abstract: A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: June 14, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Noriko Ishimaru
  • Patent number: 8754577
    Abstract: An EL display device capable of reducing an average film resistance of an anode in an EL device as well as displaying an image with high definition, and electrical equipment including such an EL display device are provided. A light-shielding metal film (109) is provided on an anode (108) so as to conceal gaps between the pixels. Thus, an average film resistance of the anode (108) in the EL device is reduced. Furthermore, light leakage from the gaps between the pixels can be prevented, resulting in an image display with high definition.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: June 17, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Noriko Ishimaru
  • Publication number: 20110210661
    Abstract: An EL display device capable of reducing an average film resistance of an anode in an EL device as well as displaying an image with high definition, and electrical equipment including such an EL display device are provided. A light-shielding metal film 109 is provided on an anode 108 so as to conceal gaps between the pixels. Thus, an average film resistance of the anode 108 in the EL device is reduced. Furthermore, light leakage from the gaps between the pixels can be prevented, resulting in an image display with high definition.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takeshi Nishi, Noriko Ishimaru
  • Patent number: 7564054
    Abstract: Measure of forming an EL layer by selectively depositing through evaporation a material for forming the EL layer at a desired location is provided. When a material for forming an EL layer is deposited, a mask (113) is provided between a sample boat (111) and a substrate (110). By applying voltage to the mask (113), the direction of progress of the material for forming the EL layer is controlled to be selectively deposited at a desired location.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: July 21, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Noriko Ishimaru
  • Patent number: 7372114
    Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: May 13, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
  • Publication number: 20070029626
    Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.
    Type: Application
    Filed: October 10, 2006
    Publication date: February 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
  • Patent number: 7166899
    Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased, to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: January 23, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
  • Publication number: 20060286889
    Abstract: An EL display device capable of reducing an average film resistance of an anode in an EL device as well as displaying an image with high definition, and electrical equipment including such an EL display device are provided. A light-shielding metal film 109 is provided on an anode 108 so as to conceal gaps between the pixels. Thus, an average film resistance of the anode 108 in the EL device is reduced. Furthermore, light leakage from the gaps between the pixels can be prevented, resulting in an image display with high definition.
    Type: Application
    Filed: August 24, 2006
    Publication date: December 21, 2006
    Inventors: Takeshi Nishi, Noriko Ishimaru
  • Publication number: 20060197080
    Abstract: Measure of forming an EL layer by selectively depositing through evaporation a material for forming the EL layer at a desired location is provided. When a material for forming an EL layer is deposited, a mask (113) is provided between a sample boat (111) and a substrate (110). By applying voltage to the mask (113), the direction of progress of the material for forming the EL layer is controlled to be selectively deposited at a desired location.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 7, 2006
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Noriko Ishimaru
  • Patent number: 7022535
    Abstract: Measure of forming an EL layer by selectively depositing through evaporation a material for forming the EL layer at a desired location is provided. When a material for forming an EL layer is deposited, a mask (113) is provided between a sample boat (111) and a substrate (110). By applying voltage to the mask (113), the direction of progress of the material for forming the EL layer is controlled to be selectively deposited at a desired location.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: April 4, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Noriko Ishimaru
  • Publication number: 20050263835
    Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased, to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.
    Type: Application
    Filed: July 15, 2005
    Publication date: December 1, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
  • Patent number: 6919282
    Abstract: A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon oxynitride film are controlled chiefly by changing the flow rates of N2O and H2. A hydrogen concentration and a nitrogen concentration in the film can be increased by the increase of the flow rate of H2. Besides, the hydrogen concentration and the nitrogen concentration in the film can be decreased to heighten an oxygen concentration by the increase of the flow rate of N2O. The gate insulating film ensures the stability and reliability of the characteristics of the TFT, such as the threshold voltage (Vth) and sub-threshold constant (S value) thereof.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: July 19, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Taketomi Asami, Shunpei Yamazaki
  • Publication number: 20040238820
    Abstract: An objective is to provide an insulating film suitable for a semiconductor device, typically a TFT, and a method of manufacturing the insulating film. A semiconductor device using this type of insulating film for a gate insulating film, a base film, and a protective insulating film or an interlayer insulating film, and a method of its manufacture, are provided. The insulating film is manufactured from a hydrogenated silicon oxynitride film by plasma CVD using SiH4, N2O, and H2 as raw material gasses. It has a composition in which the oxygen concentration is set from 55 to 70 atomic %, the nitrogen concentration is set from 0.1 to 6 atomic %, preferably between 0.1 and 2 atomic %, and the hydrogen concentration is set from 0.1 to 3 atomic %. In order to make a film with this composition, the substrate temperature is set from 350 to 500° C., preferably between 400 and 450° C., and the electric discharge power density is set between 0.1 and 1 W/cm2.
    Type: Application
    Filed: September 24, 2003
    Publication date: December 2, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsunori Sakama, Taketomi Asami, Noriko Ishimaru, Shunpei Yamazaki
  • Publication number: 20040171182
    Abstract: Measure of forming an EL layer by selectively depositing through evaporation a material for forming the EL layer at a desired location is provided. When a material for forming an EL layer is deposited, a mask (113) is provided between a sample boat (111) and a substrate (110). By applying voltage to the mask (113), the direction of progress of the material for forming the EL layer is controlled to be selectively deposited at a desired location.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 2, 2004
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Noriko Ishimaru
  • Patent number: 6730992
    Abstract: To a provide a method of forming a layered film of a silicon nitride film and a silicon oxide film on a glass substrate in a short time without requiring a plurality of film deposition chambers. In a thin film transistor, a layered film including a silicon nitride oxide film (12) is formed between a semiconductor layer (13) and a substrate (11) using the same chamber. The silicon nitride oxide film has a continuously changing composition ration of nitrogen or oxygen. An electric characteristic of the TFT is thus improved.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: May 4, 2004
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Masahiko Miwa, Mitinori Iwai
  • Patent number: 6699739
    Abstract: Measure of forming an EL layer by selectively depositing through evaporation a material for forming the EL layer at a desired location is provided. When a material for forming an EL layer is deposited, a mask (113) is provided between a sample boat (111) and a substrate (110). By applying voltage to the mask (113), the direction of progress of the material for forming the EL layer is controlled to be selectively deposited at a desired location.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: March 2, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Noriko Ishimaru