Abstract: In view of the fact that a limited storage area of a facsimile memory cannot store a large amount of data necessary to operate and manage the facsimile machine, a hard disk of a personal computer connected to the facsimile machine is used for storing such a large amount of data. For example, an application software needed for achieving a certain function of the facsimile machine is supplied from a service station managed by a manufacturer of the facsimile machine and is downloaded and installed in a hard disk of the personal computer. An example of the function is a scheduled/delayed transmission for scheduling a time of facsimile transmission at a specific time or after a certain period of time has passed. As far as the facsimile machine and the personal computer are connected, other kinds of data, such as help list data and facsimile transaction information, are stored in the hard disk of the personal computer.

Abstract: Layout data about a core part of a predesigned microcontroller such as a CPU block obtained by custom layout design, and logical data about a peripheral part of the microcontroller are read out from a library of components. These layout and logical data are reused for the layout design of a new microcontroller. The peripheral part logical data is modified according to circuit information about the new microcontroller. Layout data about a peripheral part of the new microcontroller is generated by an automatic placement/wire routing tool from the modified logical data. The core part layout data is simply reused as is for a core part of the new microcontroller. Layout data about the entire new microcontroller is generated by a block-to-block automatic placement/wire routing tool from layout data about individual circuit blocks.

Abstract: An improved LSI design automation system includes: an input unit, a circuit component storage unit, a circuit component selection unit, a design method decision unit, a design process unit, and a component entry unit. The input unit receives LSI function and performance information as a requirements specification and LSI component configuration information. The circuit component storage unit collectively stores a circuit data item, design method information items, and performance information items, as a circuit component. The circuit component selection unit selects a circuit component from the circuit component storage unit for implementation of a desired circuit. The design method decision unit selects an optimum design method information item from the design method information items held by each circuit component. The design process unit generates, modifies, and evaluates a circuit.

Abstract: In a data processor such as a CAD system for LSI design, a hierarchical structure of a plurality of objects each having a circuit data is represented in a relation between a window on a menu screen and a plurality of figure blocks on the window. One of the plural figure blocks on the window is represented in a different window so as to represent a multi-hierarchical structure of the objects, and a block figure group is arranged on the different window. A user selects, using a mouse, an object to be processed on a menu screen representing a floor plan.

Abstract: A logic synthesis unit generates configuration data of a virtual logic circuit composed of virtual elements, or logic gates each of which carries only a functional definition, in order to realize a logic circuit functional description fed through an input unit. A logic transformation unit, referring to a standard cell library, performs the allocation of real elements for implementation to respective virtual elements to transform the virtual logic circuit into a real logic circuit having the same function as the virtual logic circuit. Then the logic transformation unit, referring to a timing analysis unit, selects a particular real element with a smallest driving capacity from among the real elements in the library performing the same function as an object virtual element and satisfying both fan-out restrictions and delay constraints, and allocates the real element thus selected to the virtual element.

Abstract: Together with circuit data of circuit elements, there is stored, in a memory device, external specification information of each of the circuit elements, the information including (i) function information of each of the terminals of the circuit elements and (ii) selection information representing a wiring condition for each of the terminals. When the element arrangement and external specification information of a circuit to be designed, are entered, pieces of external specification information are compared with one another to obtain pairs of wiring candidates of a circuit which connects, to one another, the circuit elements of the circuit to be designed. Based on the pairs of wiring candidates, there is generated wiring information which satisfies each wiring condition. Based on the pieces of wiring information thus generated, there are automatically generated circuit data of the circuit to be designed.

Abstract: A plurality of types of circuit transformation rules have condition parts and conclusion parts. An inference control knowledge includes a knowledge related to a method of inferring the circuit transformation rules and a knowledge related to a relation between the circuit transformation rules. The circuit transformation rules are compiled into circuit transformation programs by use of the inference control knowledge. Already-existing programs include a procedural process of a logic design and various functions necessary for an execution of the circuit transformation programs. The circuit transformation programs and the already-existing programs are combined into a logic design program. A circuit transformation process is executed in accordance with the logic design program.

Abstract: In a system for transforming input circuit information into information of a logic circuit composed of actual elements, a schematic diagram of a logic circuit composed of actual elements is displayed. A timing check is executed on the displayed logic circuit. A delay adjustment portion of the displayed schematic diagram is designated. A timing adjustment is executed by the system on the designated delay adjustment portion, and thereby the logic circuit is transformed into a second logic circuit composed of actual elements.

Abstract: Circuit transformation of a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements is effected by selecting a candidate rule from a knowledge base memory. The knowledge base memory stores therein transformation rules expressed by a condition part and a conclusion part. The condition part of a candidate rule is matched to circuit data stored in a working memory. The application condition of the candidate rules is determined, and the candidate rule is applied to the circuit data of the working memory for transforming the circuit after confirmation of the establishment of the application condition. The knowledge base memory stores therein concise transformation rules including at least one of main transformation rules, subordinate transformation rules, logic negation rules and logic equivalence rules.