Patents by Inventor Norimasa Katakura

Norimasa Katakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for polishing semiconductor substrates that adjust for pad-to-pad variance
    Patent number: 11081359
    Abstract: Methods for polishing semiconductor substrates that involve adjusting the finish polishing sequence based on the pad-to-pad variance of the polishing pad are disclosed.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: August 3, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ichiro Yoshimura, Alex Chu, H. J. Chiu, Sumeet Bhagavat, TaeHyeong Kim, Norimasa Katakura, Masaru Kitazawa
  • METHODS FOR POLISHING SEMICONDUCTOR SUBSTRATES THAT ADJUST FOR PAD-TO-PAD VARIANCE
    Publication number: 20200083057
    Abstract: Methods for polishing semiconductor substrates that involve adjusting the finish polishing sequence based on the pad-to-pad variance of the polishing pad are disclosed.
    Type: Application
    Filed: August 22, 2019
    Publication date: March 12, 2020
    Inventors: Ichiro Yoshimura, Alex Chu, H.J. Chiu, Sumeet Bhagavat, TaeHyeong Kim, Norimasa Katakura, Masaru Kitazawa