Patents by Inventor Norio Endoh

Norio Endoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5081453
    Abstract: An input detecting apparatus, method in a switching matrix in which a plurality of switches are provided in the form of a matrix, which discriminates a sneak pass signal current caused by overlapping keying of up to 10 switches and is provided with a switching matrix including a driver circuit, a detecting circuit, a first group of a plurality of lines (1.sub.0 -1.sub.6), each connected to the driver circuit (2), a second group of a plurality of lines (3.sub.0 -3.sub.6), each connected to the detecting circuit, and a plurality of switching devices including a resistor (6) and a switching element (5) serially arranged, one end of each switching device being connected to one of the first group of lines and the other end to one of the second group of lines, the driver circuit having a decoder (11) which in turn connects one end of each oen of the plurality of lines of the first group (1.sub.0 -1.sub.
    Type: Grant
    Filed: September 11, 1989
    Date of Patent: January 14, 1992
    Assignee: Fujitsu Limited
    Inventors: Norio Endoh, Shigeo Tanji, Kazutoshi Hayashi, Hideo Yamada
  • Patent number: 4994634
    Abstract: A sheet switch comprises a pair of flexible insulative films, one of which is provided with a plurality of electrodes, resistances connected to the electrodes, respectively, and line patterns for externally connecting the electrodes via the resistances. The other insulative film is also provided with a plurality of second electrodes at positions corresponding to the first electrodes, respectively, and a space is defined between each of the facing electrodes. The line pattern is a laminated structure consisting of an underlayer formed of a low resistance paste and an upper layer formed of a high resistance paste coated over the underlayer. The underlayer formed of a low resistance paste is partially disconnected to define a gap, so that the resistance is formed integrally with the upper layer formed of a high resistance paste at a position corresponding to the gap.
    Type: Grant
    Filed: August 31, 1989
    Date of Patent: February 19, 1991
    Assignee: Fujitsu Limited
    Inventors: Shigeo Tanji, Kazutoshi Hayashi, Hideo Yamada, Norio Endoh