Patents by Inventor Norio Furuishi

Norio Furuishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10637639
    Abstract: To collect highly accurately filter-processed data. Sensor signals are acquired from sensors in predetermined data acquisition periods, a filtering process is performed on the sensor signals, time series data generated by extracting some of the filtered sensor signals is transmitted to an external device in a predetermined data transmission period that is longer than the data acquisition period, and the data transmission period is synchronized with a communication period of the external device.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: April 28, 2020
    Assignee: OMRON Corporation
    Inventors: Norio Furuishi, Shuntaro Suzuki
  • Publication number: 20190238307
    Abstract: To collect highly accurately filter-processed data. Sensor signals are acquired from sensors in predetermined data acquisition periods, a filtering process is performed on the sensor signals, time series data generated by extracting some of the filtered sensor signals is transmitted to an external device in a predetermined data transmission period that is longer than the data acquisition period, and the data transmission period is synchronized with a communication period of the external device.
    Type: Application
    Filed: October 16, 2018
    Publication date: August 1, 2019
    Applicant: OMRON Corporation
    Inventors: Norio FURUISHI, Shuntaro SUZUKI
  • Patent number: 8392634
    Abstract: A PLC of building block type includes a switch module incorporating a switch part having N-to-N switch function between serial communication lines with a plurality of lines and a plurality of device modules individually incorporating device systems with various advanced-function device module characteristics. A CPU system having CPU functions of the PLC may be incorporated in the switch module, the switch module incorporating the CPU system and the plurality of device modules being connected together into a single body in a building block structure through module-connecting mechanisms. Dedicated serial communication lines each with a single line or a plurality of lines connect between the switch module incorporating the CPU system and each of the plurality of device modules such that a star-shaped serial communication network is formed with the switch module incorporating the CPU system as a central node and each of the plurality of device modules as a peripheral node.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: March 5, 2013
    Assignee: OMRON Corporation
    Inventors: Tomohisa Ishino, Norio Furuishi
  • Patent number: 7852790
    Abstract: The present invention provides a communication master station startup period control method of being able to securely prevent malfunction of a PLC system, even if at least two communication master stations are connected to the PLC system which permits only one communication master station on the network. After the startup, when it is determined that the communication master stations exist redundantly by a master plurality determination process performed in advance of a link establishment process, the transition to a predetermined master plurality avoidance process is made without making the transition to the link establishment process. Further, when it is determined that the communication master stations exist redundantly by the master plurality determination process performed in parallel with the link establishment process, the transition to the predetermined master plurality avoidance process is made without making the transition to an operation state.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: December 14, 2010
    Assignee: Omron Corporation
    Inventors: Norio Furuishi, Masanori Fujikawa
  • Publication number: 20080222325
    Abstract: A PLC of building block type includes a switch module incorporating a switch part having N-to-N switch function between serial communication lines with a plurality of lines and a plurality of device modules individually incorporating device systems with various advanced-function device module characteristics. A CPU system having CPU functions of the PLC may be incorporated in the switch module, the switch module incorporating the CPU system and the plurality of device modules being connected together into a single body in a building block structure through module-connecting mechanisms. Dedicated serial communication lines each with a single line or a plurality of lines connect between the switch module incorporating the CPU system and each of the plurality of device modules such that a star-shaped serial communication network is formed with the switch module incorporating the CPU system as a central node and each of the plurality of device modules as a peripheral node.
    Type: Application
    Filed: February 25, 2008
    Publication date: September 11, 2008
    Applicant: OMRON CORPORATION
    Inventors: Tomohisa Ishino, Norio Furuishi
  • Publication number: 20060282506
    Abstract: The present invention provides a communication master station startup period control method of being able to securely prevent malfunction of a PLC system, even if at least two communication master stations are connected to the PLC system which permits only one communication master station on the network. After the startup, when it is determined that the communication master stations exist redundantly by a master plurality determination process performed in advance of a link establishment process, the transition to a predetermined master plurality avoidance process is made without making the transition to the link establishment process. Further, when it is determined that the communication master stations exist redundantly by the master plurality determination process performed in parallel with the link establishment process, the transition to the predetermined master plurality avoidance process is made without making the transition to an operation state.
    Type: Application
    Filed: June 5, 2006
    Publication date: December 14, 2006
    Inventors: Norio Furuishi, Masanori Fujikawa