Patents by Inventor Norio Hirashita

Norio Hirashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Structure of a semiconductor chip having a conductive layer
    Patent number: 5288948
    Abstract: In order to prevent the occurrence of corrosion due to the sliding of a relatively wide aluminum conductive layer (12) such as a power source conductive layer or a ground conductive layer, formed on a semiconductor substrate (11), breakage of a lower conductive layer due to the sliding of an upper aluminum conductive layer (12) in case of a multilayer interconnection, and the creation of voids in the lower aluminum conductive layer due to the moisture beneath the relatively wide metal conductive layer in case of a multi layer interconnection etc., the conductive layer structure is constructed so that the conductive layer (12) relatively great in width is divided into several conductive layer portions and so that the width of each of the divided conductive layer portions is in a range of 10 .mu.m to 40 .mu.m.
    Type: Grant
    Filed: December 26, 1991
    Date of Patent: February 22, 1994
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yasuhiro Fukuda, Tetsuhiko Sugahara, Norio Hirashita, Mitsuhiro Matsuo, Minoru Saito, Masayuki Kobayakawa, Fumitaka Yokoyama